SLAAEH7 February   2024 MSPM0L1306

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 System Description
    2. 1.2 Design 1: High Efficiency Design with 50kHz
    3. 1.3 Design 2: Space Optimized Design with 250kHz
    4. 1.4 Design 3: MCU Driven Design with Flexible Switching Frequency
      1. 1.4.1 Selection of MOSFETs
      2. 1.4.2 Efficiency Test
        1. 1.4.2.1 Current Consumption of PWM (Ipwm) Test
        2. 1.4.2.2 Efficiency Test Set Up
        3. 1.4.2.3 Efficiency Test Results at 50kHz Switching Frequency
        4. 1.4.2.4 Efficiency Test Results at 250kHz Switching Frequency
  5. 2Design File
    1. 2.1 Schematics
    2. 2.2 Bill of Materials
  6. 3Summary
  7. 4References

1.4.2.2 Efficiency Test Set Up

Efficiency of isolated DC/DC is a critical parameter for two-wire loop-powered 4 to 20mA field transmitter system, influencing both the power consumption and the reliability of the loop power supply. Figure 2-11 illustrates the setup of the MCU driven design efficiency test. The setup includes precision instruments that are connected to record the input and output voltages (Vin and Vout) and currents (Iin and Iout). Using a rotating resistor box as the load, it operates over an output current range up to 10mA to test. Digital multimeters are in place to capture voltage and current readings with high accuracy, ensuring the collected data reflects the true performance of this design. The efficiency can be calculated by using Equation 1, where Ipwm is the test results in the previous section.

Equation 1. Efficiency= Vout×IoutVin×(Iin+Ipwm)
GUID-20240102-SS0I-W1SS-MKC8-HHSJ1DPZZ0Z9-low.svg Figure 1-6 Set Up of Efficiency Test