SLAAEO5 September 2024 MSPM0C1103 , MSPM0C1103-Q1 , MSPM0C1104 , MSPM0C1104-Q1 , MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3105-Q1 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3505-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0L1105
Memory within MSPM0 devices are organized into banks, with each bank of memory containing sectors of memory that are 1kB each in size. With certain variants of MSPM0 they can contain several banks of memory as well. This is important to understand when implementing the programming algorithm for flash of MSPM0 (1), as it is vital that the nuances between devices are well understood. It is also important to isolate any flash operation between different memory spaces such as the nonmain and main memory into their own programming operation. This section of the application note goes into further details on how to handle flash across the MSPM0 family in regular debugging to production environment.