SLAS564I August   2007  – December 2024 CDCE937 , CDCEL937

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements: CLK_IN
    7. 5.7 Timing Requirements: SDA/SCL
    8. 5.8 EEPROM Specification
    9. 5.9 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Terminal Setting
      2. 7.3.2 Default Device Setting
      3. 7.3.3 SDA/SCL Serial Interface
      4. 7.3.4 Data Protocol
    4. 7.4 Device Functional Modes
      1. 7.4.1 SDA/SCL Hardware Interface
    5. 7.5 Programming
  9. Register Maps
    1. 8.1 SDA/SCL Configuration Registers
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Spread Spectrum Clock (SSC)
        2. 9.2.2.2 PLL Frequency Planning
        3. 9.2.2.3 Crystal Oscillator Start-Up
        4. 9.2.2.4 Frequency Adjustment With Crystal Oscillator Pulling
        5. 9.2.2.5 Unused Inputs and Outputs
        6. 9.2.2.6 Switching Between XO and VCXO Mode
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Revision History

Changes from Revision H (July 2024) to Revision I (October 2024)

  • Added relevant end equipment linksGo
  • Replaced instances of "master/slave" to "controller/target" throughout the documentGo
  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added information on allowable data inputs during the EEPROM write cycle in Data Protocol Go
  • Renamed SLAVE_ADR to I2C_ADR Go
  • Updated Power Supply Recommendations Go
  • Included EVM User's GuidesGo

Changes from Revision G (October 2016) to Revision H (July 2024)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo

Changes from Revision F (March 2010) to Revision G (October 2016)

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information sectionGo
  • Changed Applications Go
  • Changed Thermal Resistance Junction to Ambient, RθJA, values in Thermal Information From: 89 (0 lfm), 75 (150 lfm), 74 (200 lfm), 74 (250 lfm), and 69 (500 lfm) To: 89.04Go
  • Deleted Input Capacitance figureGo

Changes from Revision E (October 2009) to Revision F (March 2010)

  • Added PLL settings limits: 16 ≤ q ≤ 63, 0 ≤ p ≤ 7, 0 ≤ r ≤ 511, 0 < N < 4096 foot to PLL1, PLL2, and PLL3 Configure Register TableGo
  • Changed 100MHz < ƒVCO > 200MHz; TO 80MHz ≤ ƒVCO ≤ 230MHz; and changed 0 ≤ p ≤ 7 TO 0 ≤ p ≤ 4Go
  • Changed under Example, fifth row, N", 2 places TO N'Go

Changes from Revision D (September 2009) to Revision E (October 2009)

  • Deleted sentence - A different default setting can be programmed on customer request. Contact Texas Instruments sales or marketing representative for more informationGo

Changes from Revision C (January 2009) to Revision D (September 2009)

  • Added Note 3: SDA and SCL can go up to 3.6V as stated in the Recommended Operating Conditions tableGo

Changes from Revision B (December 2007) to Revision C (January 2009)

  • Changed Generic Configuration Register table SLAVE_ADR default value From: 00b To: 01bGo

Changes from Revision A (September 2007) to Revision B (December 2007)

  • Changed Terminal Functions Table - the pin numbers to correspond with pin outs on the packageGo
  • Added note to PWDN description to Generic Configuration Register tableGo
  • Changed Generic Configuration Register table RID default From: 0h To: XbGo

Changes from Revision * (August 2007) to Revision A (September 2007)

  • Changed the data sheet status From: Product Preview To: Production dataGo