SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
| * ADC[.W] | Add carry to destination | |
| * ADC.B | Add carry to destination | |
| Syntax | ADC dst or ADC.W dst | |
| ADC.B dst | ||
| Operation | dst + C → dst | |
| Emulation | ADDC #0,dst | |
| ADDC.B #0,dst | ||
| Description | The carry bit (C) is added to the destination operand. The previous contents of the destination are lost. | |
| Status Bits | N: | Set if result is negative, reset if positive |
| Z: | Set if result is zero, reset otherwise | |
| C: | Set if dst was incremented from 0FFFFh to 0000, reset otherwise | |
| Set if dst was incremented from 0FFh to 00, reset otherwise | ||
| V: | Set if an arithmetic overflow occurs, otherwise reset | |
| Mode Bits | OSCOFF, CPUOFF, and GIE are not affected. | |
| Example | The 16-bit counter pointed to by R13 is added to a 32-bit counter pointed to by R12. | |
ADD @R13,0(R12) ; Add LSDs
ADC 2(R12) ; Add carry to MSD
| Example | The 8-bit counter pointed to by R13 is added to a 16-bit counter pointed to by R12. | |
ADD.B @R13,0(R12) ; Add LSDs
ADC.B 1(R12) ; Add carry to MSD