SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
The digital I/O registers are listed in Table 12-3. The base addresses can be found in the device-specific data sheet. Each port grouping begins at its base address. The address offsets are given in Table 12-3.
NOTE
All registers have word or byte register access. For a generic register ANYREG, the suffix "_L" (ANYREG_L) refers to the lower byte of the register (bits 0 through 7). The suffix "_H" (ANYREG_H) refers to the upper byte of the register (bits 8 through 15).
Offset | Acronym | Register Name | Type | Access | Reset | Section |
---|---|---|---|---|---|---|
0Eh | P1IV | Port 1 Interrupt Vector | Read only | Word | 0000h | Section 12.4.1 |
0Eh | P1IV_L | Read only | Byte | 00h | ||
0Fh | P1IV_H | Read only | Byte | 00h | ||
1Eh | P2IV | Port 2 Interrupt Vector | Read only | Word | 0000h | Section 12.4.1 |
1Eh | P2IV_L | Read only | Byte | 00h | ||
1Fh | P2IV_H | Read only | Byte | 00h | ||
2Eh | P3IV | Port 3 Interrupt Vector | Read only | Word | 0000h | Section 12.4.1 |
2Eh | P3IV_L | Read only | Byte | 00h | ||
2Fh | P3IV_H | Read only | Byte | 00h | ||
3Eh | P4IV | Port 4 Interrupt Vector | Read only | Word | 0000h | Section 12.4.1 |
3Eh | P4IV_L | Read only | Byte | 00h | ||
3Fh | P4IV_H | Read only | Byte | 00h | ||
4Eh | P5IV | Port 5 Interrupt Vector | Read only | Word | 0000h | Section 12.4.1 |
4Eh | P5IV_L | Read only | Byte | 00h | ||
4Fh | P5IV_H | Read only | Byte | 00h | ||
5Eh | P6IV | Port 6 Interrupt Vector | Read only | Word | 0000h | Section 12.4.1 |
5Eh | P6IV_L | Read only | Byte | 00h | ||
5Fh | P6IV_H | Read only | Byte | 00h | ||
6Eh | P7IV | Port 7 Interrupt Vector | Read only | Word | 0000h | Section 12.4.1 |
6Eh | P7IV_L | Read only | Byte | 00h | ||
6Fh | P7IV_H | Read only | Byte | 00h | ||
7Eh | P8IV | Port 8 Interrupt Vector | Read only | Word | 0000h | Section 12.4.1 |
7Eh | P8IV_L | Read only | Byte | 00h | ||
7Fh | P8IV_H | Read only | Byte | 00h | ||
8Eh | P9IV | Port 9 Interrupt Vector | Read only | Word | 0000h | Section 12.4.1 |
8Eh | P9IV_L | Read only | Byte | 00h | ||
8Fh | P9IV_H | Read only | Byte | 00h | ||
00h | P1IN
or PAIN_L |
Port 1 Input | Read only | Byte | undefined | Section 12.4.2 |
02h | P1OUT
or PAOUT_L |
Port 1 Output | Read/write | Byte | undefined | Section 12.4.3 |
04h | P1DIR
or PADIR_L |
Port 1 Direction | Read/write | Byte | 00h | Section 12.4.4 |
06h | P1REN
or PAREN_L |
Port 1 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Ah | P1SEL0
or PASEL0_L |
Port 1 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Ch | P1SEL1
or PASEL1_L |
Port 1 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
16h | P1SELC
or PASELC_L |
Port 1 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
18h | P1IES
or PAIES_L |
Port 1 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Ah | P1IE
or PAIE_L |
Port 1 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Ch | P1IFG
or PAIFG_L |
Port 1 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
01h | P2IN
or PAIN_H |
Port 2 Input | Read only | Byte | undefined | Section 12.4.2 |
03h | P2OUT
or PAOUT_H |
Port 2 Output | Read/write | Byte | undefined | Section 12.4.3 |
05h | P2DIR
or PADIR_H |
Port 2 Direction | Read/write | Byte | 00h | Section 12.4.4 |
07h | P2REN
or PAREN_H |
Port 2 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Bh | P2SEL0
or PASEL0_H |
Port 2 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Dh | P2SEL1
or PASEL1_H |
Port 2 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
17h | P2SELC
or PASELC_L |
Port 2 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
19h | P2IES
or PAIES_H |
Port 2 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Bh | P2IE
or PAIE_H |
Port 2 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Dh | P2IFG
or PAIFG_H |
Port 2 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
00h | P3IN
or PBIN_L |
Port 3 Input | Read only | Byte | undefined | Section 12.4.2 |
02h | P3OUT
or PBOUT_L |
Port 3 Output | Read/write | Byte | undefined | Section 12.4.3 |
04h | P3DIR
or PBDIR_L |
Port 3 Direction | Read/write | Byte | 00h | Section 12.4.4 |
06h | P3REN
or PBREN_L |
Port 3 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Ah | P3SEL0
or PBSEL0_L |
Port 3 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Ch | P3SEL1
or PBSEL1_L |
Port 3 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
16h | P3SELC
or PBSELC_L |
Port 3 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
18h | P3IES
or PBIES_L |
Port 3 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Ah | P3IE
or PBIE_L |
Port 3 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Ch | P3IFG
or PBIFG_L |
Port 3 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
01h | P4IN
or PBIN_H |
Port 4 Input | Read only | Byte | undefined | Section 12.4.2 |
03h | P4OUT
or PBOUT_H |
Port 4 Output | Read/write | Byte | undefined | Section 12.4.3 |
05h | P4DIR
or PBDIR_H |
Port 4 Direction | Read/write | Byte | 00h | Section 12.4.4 |
07h | P4REN
or PBREN_H |
Port 4 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Bh | P4SEL0
or PBSEL0_H |
Port 4 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Dh | P4SEL1
or PBSEL1_H |
Port 4 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
17h | P4SELC
or PBSELC_L |
Port 4 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
19h | P4IES
or PBIES_H |
Port 4 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Bh | P4IE
or PBIE_H |
Port 4 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Dh | P4IFG
or PBIFG_H |
Port 4 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
00h | P5IN
or PCIN_L |
Port 5 Input | Read only | Byte | undefined | Section 12.4.2 |
02h | P5OUT
or PCOUT_L |
Port 5 Output | Read/write | Byte | undefined | Section 12.4.3 |
04h | P5DIR
or PCDIR_L |
Port 5 Direction | Read/write | Byte | 00h | Section 12.4.4 |
06h | P5REN
or PCREN_L |
Port 5 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Ah | P5SEL0
or PCSEL0_L |
Port 5 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Ch | P5SEL1
or PCSEL1_L |
Port 5 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
16h | P5SELC
or PCSELC_L |
Port 5 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
18h | P5IES
or PCIES_L |
Port 5 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Ah | P5IE
or PCIE_L |
Port 5 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Ch | P5IFG
or PCIFG_L |
Port 5 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
01h | P6IN
or PCIN_H |
Port 6 Input | Read only | Byte | undefined | Section 12.4.2 |
03h | P6OUT
or PCOUT_H |
Port 6 Output | Read/write | Byte | undefined | Section 12.4.3 |
05h | P6DIR
or PCDIR_H |
Port 6 Direction | Read/write | Byte | 00h | Section 12.4.4 |
07h | P6REN
or PCREN_H |
Port 6 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Bh | P6SEL0
or PCSEL0_H |
Port 6 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Dh | P6SEL1
or PCSEL1_H |
Port 6 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
17h | P6SELC
or PCSELC_L |
Port 6 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
19h | P6IES
or PCIES_H |
Port 6 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Bh | P6IE
or PCIE_H |
Port 6 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Dh | P6IFG
or PCIFG_H |
Port 6 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
00h | P7IN
or PDIN_L |
Port 7 Input | Read only | Byte | undefined | Section 12.4.2 |
02h | P7OUT
or PDOUT_L |
Port 7 Output | Read/write | Byte | undefined | Section 12.4.3 |
04h | P7DIR
or PDDIR_L |
Port 7 Direction | Read/write | Byte | 00h | Section 12.4.4 |
06h | P7REN
or PDREN_L |
Port 7 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Ah | P7SEL0
or PDSEL0_L |
Port 7 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Ch | P7SEL1
or PDSEL1_L |
Port 7 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
16h | P7SELC
or PDSELC_L |
Port 7 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
18h | P7IES
or PDIES_L |
Port 7 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Ah | P7IE
or PDIE_L |
Port 7 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Ch | P7IFG
or PDIFG_L |
Port 7 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
01h | P8IN
or PDIN_H |
Port 8 Input | Read only | Byte | undefined | Section 12.4.2 |
03h | P8OUT
or PDOUT_H |
Port 8 Output | Read/write | Byte | undefined | Section 12.4.3 |
05h | P8DIR
or PDDIR_H |
Port 8 Direction | Read/write | Byte | 00h | Section 12.4.4 |
07h | P8REN
or PDREN_H |
Port 8 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Bh | P8SEL0
or PDSEL0_H |
Port 8 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Dh | P8SEL1
or PDSEL1_H |
Port 8 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
17h | P8SELC
or PDSELC_L |
Port 8 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
19h | P8IES
or PDIES_H |
Port 8 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Bh | P8IE
or PDIE_H |
Port 8 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Dh | P8IFG
or PDIFG_H |
Port 8 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
00h | P9IN
or PEIN_L |
Port 9 Input | Read only | Byte | undefined | Section 12.4.2 |
02h | P9OUT
or PEOUT_L |
Port 9 Output | Read/write | Byte | undefined | Section 12.4.3 |
04h | P9DIR
or PEDIR_L |
Port 9 Direction | Read/write | Byte | 00h | Section 12.4.4 |
06h | P9REN
or PEREN_L |
Port 9 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Ah | P9SEL0
or PESEL0_L |
Port 9 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Ch | P9SEL1
or PESEL1_L |
Port 9 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
16h | P9SELC
or PESELC_L |
Port 9 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
18h | P9IES
or PEIES_L |
Port 9 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Ah | P9IE
or PEIE_L |
Port 9 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Ch | P9IFG
or PEIFG_L |
Port 9 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
01h | P10IN
or PEIN_H |
Port 10 Input | Read only | Byte | undefined | Section 12.4.2 |
03h | P10OUT
or PEOUT_H |
Port 10 Output | Read/write | Byte | undefined | Section 12.4.3 |
05h | P10DIR
or PEDIR_H |
Port 10 Direction | Read/write | Byte | 00h | Section 12.4.4 |
07h | P10REN
or PEREN_H |
Port 10 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Bh | P10SEL0
or PESEL0_H |
Port 10 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Dh | P10SEL1
or PESEL1_H |
Port 10 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
17h | P10SELC
or PESELC_L |
Port 10 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
19h | P10IES
or PEIES_H |
Port 10 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Bh | P10IE
or PEIE_H |
Port 10 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Dh | P10IFG
or PEIFG_H |
Port 10 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
00h | P11IN
or PFIN_L |
Port 11 Input | Read only | Byte | undefined | Section 12.4.2 |
02h | P11OUT
or PFOUT_L |
Port 11 Output | Read/write | Byte | undefined | Section 12.4.3 |
04h | P11DIR
or PFDIR_L |
Port 11 Direction | Read/write | Byte | 00h | Section 12.4.4 |
06h | P11REN
or PFREN_L |
Port 11 Resistor Enable | Read/write | Byte | 00h | Section 12.4.5 |
0Ah | P11SEL0
or PFSEL0_L |
Port 11 Select 0 | Read/write | Byte | 00h | Section 12.4.6 |
0Ch | P11SEL1
or PFSEL1_L |
Port 11 Select 1 | Read/write | Byte | 00h | Section 12.4.7 |
16h | P11SELC
or PFSELC_L |
Port 11 Complement Selection | Read/write | Byte | 00h | Section 12.4.8 |
18h | P11IES
or PFIES_L |
Port 11 Interrupt Edge Select | Read/write | Byte | undefined | Section 12.4.9 |
1Ah | P11IE
or PFIE_L |
Port 11 Interrupt Enable | Read/write | Byte | 00h | Section 12.4.10 |
1Ch | P11IFG
or PFIFG_L |
Port 11 Interrupt Flag | Read/write | Byte | 00h | Section 12.4.11 |
00h | PAIN | Port A Input | Read only | Word | undefined | |
00h | PAIN_L | Read only | Byte | undefined | ||
01h | PAIN_H | Read only | Byte | undefined | ||
02h | PAOUT | Port A Output | Read/write | Word | undefined | |
02h | PAOUT_L | Read/write | Byte | undefined | ||
03h | PAOUT_H | Read/write | Byte | undefined | ||
04h | PADIR | Port A Direction | Read/write | Word | 0000h | |
04h | PADIR_L | Read/write | Byte | 00h | ||
05h | PADIR_H | Read/write | Byte | 00h | ||
06h | PAREN | Port A Resistor Enable | Read/write | Word | 0000h | |
06h | PAREN_L | Read/write | Byte | 00h | ||
07h | PAREN_H | Read/write | Byte | 00h | ||
0Ah | PASEL0 | Port A Select 0 | Read/write | Word | 0000h | |
0Ah | PASEL0_L | Read/write | Byte | 00h | ||
0Bh | PASEL0_H | Read/write | Byte | 00h | ||
0Ch | PASEL1 | Port A Select 1 | Read/write | Word | 0000h | |
0Ch | PASEL1_L | Read/write | Byte | 00h | ||
0Dh | PASEL1_H | Read/write | Byte | 00h | ||
16h | PASELC | Port A Complement Select | Read/write | Word | 0000h | |
16h | PASELC_L | Read/write | Byte | 00h | ||
17h | PASELC_H | Read/write | Byte | 00h | ||
18h | PAIES | Port A Interrupt Edge Select | Read/write | Word | undefined | |
18h | PAIES_L | Read/write | Byte | undefined | ||
19h | PAIES_H | Read/write | Byte | undefined | ||
1Ah | PAIE | Port A Interrupt Enable | Read/write | Word | 0000h | |
1Ah | PAIE_L | Read/write | Byte | 00h | ||
1Bh | PAIE_H | Read/write | Byte | 00h | ||
1Ch | PAIFG | Port A Interrupt Flag | Read/write | Word | 0000h | |
1Ch | PAIFG_L | Read/write | Byte | 00h | ||
1Dh | PAIFG_H | Read/write | Byte | 00h | ||
00h | PBIN | Port B Input | Read only | Word | undefined | |
00h | PBIN_L | Read only | Byte | undefined | ||
01h | PBIN_H | Read only | Byte | undefined | ||
02h | PBOUT | Port B Output | Read/write | Word | undefined | |
02h | PBOUT_L | Read/write | Byte | undefined | ||
03h | PBOUT_H | Read/write | Byte | undefined | ||
04h | PBDIR | Port B Direction | Read/write | Word | 0000h | |
04h | PBDIR_L | Read/write | Byte | 00h | ||
05h | PBDIR_H | Read/write | Byte | 00h | ||
06h | PBREN | Port B Resistor Enable | Read/write | Word | 0000h | |
06h | PBREN_L | Read/write | Byte | 00h | ||
07h | PBREN_H | Read/write | Byte | 00h | ||
0Ah | PBSEL0 | Port B Select 0 | Read/write | Word | 0000h | |
0Ah | PBSEL0_L | Read/write | Byte | 00h | ||
0Bh | PBSEL0_H | Read/write | Byte | 00h | ||
0Ch | PBSEL1 | Port B Select 1 | Read/write | Word | 0000h | |
0Ch | PBSEL1_L | Read/write | Byte | 00h | ||
0Dh | PBSEL1_H | Read/write | Byte | 00h | ||
16h | PBSELC | Port B Complement Select | Read/write | Word | 0000h | |
16h | PBSELC_L | Read/write | Byte | 00h | ||
17h | PBSELC_H | Read/write | Byte | 00h | ||
18h | PBIES | Port B Interrupt Edge Select | Read/write | Word | undefined | |
18h | PBIES_L | Read/write | Byte | undefined | ||
19h | PBIES_H | Read/write | Byte | undefined | ||
1Ah | PBIE | Port B Interrupt Enable | Read/write | Word | 0000h | |
1Ah | PBIE_L | Read/write | Byte | 00h | ||
1Bh | PBIE_H | Read/write | Byte | 00h | ||
1Ch | PBIFG | Port B Interrupt Flag | Read/write | Word | 0000h | |
1Ch | PBIFG_L | Read/write | Byte | 00h | ||
1Dh | PBIFG_H | Read/write | Byte | 00h | ||
00h | PCIN | Port C Input | Read only | Word | undefined | |
00h | PCIN_L | Read only | Byte | undefined | ||
01h | PCIN_H | Read only | Byte | undefined | ||
02h | PCOUT | Port C Output | Read/write | Word | undefined | |
02h | PCOUT_L | Read/write | Byte | undefined | ||
03h | PCOUT_H | Read/write | Byte | undefined | ||
04h | PCDIR | Port C Direction | Read/write | Word | 0000h | |
04h | PCDIR_L | Read/write | Byte | 00h | ||
05h | PCDIR_H | Read/write | Byte | 00h | ||
06h | PCREN | Port C Resistor Enable | Read/write | Word | 0000h | |
06h | PCREN_L | Read/write | Byte | 00h | ||
07h | PCREN_H | Read/write | Byte | 00h | ||
0Ah | PCSEL0 | Port C Select 0 | Read/write | Word | 0000h | |
0Ah | PCSEL0_L | Read/write | Byte | 00h | ||
0Bh | PCSEL0_H | Read/write | Byte | 00h | ||
0Ch | PCSEL1 | Port C Select 1 | Read/write | Word | 0000h | |
0Ch | PCSEL1_L | Read/write | Byte | 00h | ||
0Dh | PCSEL1_H | Read/write | Byte | 00h | ||
16h | PCSELC | Port C Complement Select | Read/write | Word | 0000h | |
16h | PCSELC_L | Read/write | Byte | 00h | ||
17h | PCSELC_H | Read/write | Byte | 00h | ||
18h | PCIES | Port C Interrupt Edge Select | Read/write | Word | undefined | |
18h | PCIES_L | Read/write | Byte | undefined | ||
19h | PCIES_H | Read/write | Byte | undefined | ||
1Ah | PCIE | Port C Interrupt Enable | Read/write | Word | 0000h | |
1Ah | PCIE_L | Read/write | Byte | 00h | ||
1Bh | PCIE_H | Read/write | Byte | 00h | ||
1Ch | PCIFG | Port C Interrupt Flag | Read/write | Word | 0000h | |
1Ch | PCIFG_L | Read/write | Byte | 00h | ||
1Dh | PCIFG_H | Read/write | Byte | 00h | ||
00h | PDIN | Port D Input | Read only | Word | undefined | |
00h | PDIN_L | Read only | Byte | undefined | ||
01h | PDIN_H | Read only | Byte | undefined | ||
02h | PDOUT | Port D Output | Read/write | Word | undefined | |
02h | PDOUT_L | Read/write | Byte | undefined | ||
03h | PDOUT_H | Read/write | Byte | undefined | ||
04h | PDDIR | Port D Direction | Read/write | Word | 0000h | |
04h | PDDIR_L | Read/write | Byte | 00h | ||
05h | PDDIR_H | Read/write | Byte | 00h | ||
06h | PDREN | Port D Resistor Enable | Read/write | Word | 0000h | |
06h | PDREN_L | Read/write | Byte | 00h | ||
07h | PDREN_H | Read/write | Byte | 00h | ||
0Ah | PDSEL0 | Port D Select 0 | Read/write | Word | 0000h | |
0Ah | PDSEL0_L | Read/write | Byte | 00h | ||
0Bh | PDSEL0_H | Read/write | Byte | 00h | ||
0Ch | PDSEL1 | Port D Select 1 | Read/write | Word | 0000h | |
0Ch | PDSEL1_L | Read/write | Byte | 00h | ||
0Dh | PDSEL1_H | Read/write | Byte | 00h | ||
16h | PDSELC | Port D Complement Select | Read/write | Word | 0000h | |
16h | PDSELC_L | Read/write | Byte | 00h | ||
17h | PDSELC_H | Read/write | Byte | 00h | ||
18h | PDIES | Port D Interrupt Edge Select | Read/write | Word | undefined | |
18h | PDIES_L | Read/write | Byte | undefined | ||
19h | PDIES_H | Read/write | Byte | undefined | ||
1Ah | PDIE | Port D Interrupt Enable | Read/write | Word | 0000h | |
1Ah | PDIE_L | Read/write | Byte | 00h | ||
1Bh | PDIE_H | Read/write | Byte | 00h | ||
1Ch | PDIFG | Port D Interrupt Flag | Read/write | Word | 0000h | |
1Ch | PDIFG_L | Read/write | Byte | 00h | ||
1Dh | PDIFG_H | Read/write | Byte | 00h | ||
00h | PEIN | Port E Input | Read only | Word | undefined | |
00h | PEIN_L | Read only | Byte | undefined | ||
01h | PEIN_H | Read only | Byte | undefined | ||
02h | PEOUT | Port E Output | Read/write | Word | undefined | |
02h | PEOUT_L | Read/write | Byte | undefined | ||
03h | PEOUT_H | Read/write | Byte | undefined | ||
04h | PEDIR | Port E Direction | Read/write | Word | 0000h | |
04h | PEDIR_L | Read/write | Byte | 00h | ||
05h | PEDIR_H | Read/write | Byte | 00h | ||
06h | PEREN | Port E Resistor Enable | Read/write | Word | 0000h | |
06h | PEREN_L | Read/write | Byte | 00h | ||
07h | PEREN_H | Read/write | Byte | 00h | ||
0Ah | PESEL0 | Port E Select 0 | Read/write | Word | 0000h | |
0Ah | PESEL0_L | Read/write | Byte | 00h | ||
0Bh | PESEL0_H | Read/write | Byte | 00h | ||
0Ch | PESEL1 | Port E Select 1 | Read/write | Word | 0000h | |
0Ch | PESEL1_L | Read/write | Byte | 00h | ||
0Dh | PESEL1_H | Read/write | Byte | 00h | ||
16h | PESELC | Port E Complement Select | Read/write | Word | 0000h | |
16h | PESELC_L | Read/write | Byte | 00h | ||
17h | PESELC_H | Read/write | Byte | 00h | ||
18h | PEIES | Port E Interrupt Edge Select | Read/write | Word | undefined | |
18h | PEIES_L | Read/write | Byte | undefined | ||
19h | PEIES_H | Read/write | Byte | undefined | ||
1Ah | PEIE | Port E Interrupt Enable | Read/write | Word | 0000h | |
1Ah | PEIE_L | Read/write | Byte | 00h | ||
1Bh | PEIE_H | Read/write | Byte | 00h | ||
1Ch | PEIFG | Port E Interrupt Flag | Read/write | Word | 0000h | |
1Ch | PEIFG_L | Read/write | Byte | 00h | ||
1Dh | PEIFG_H | Read/write | Byte | 00h | ||
00h | PFIN | Port F Input | Read only | Word | undefined | |
00h | PFIN_L | Read only | Byte | undefined | ||
01h | PFIN_H | Read only | Byte | undefined | ||
02h | PFOUT | Port F Output | Read/write | Word | undefined | |
02h | PFOUT_L | Read/write | Byte | undefined | ||
03h | PFOUT_H | Read/write | Byte | undefined | ||
04h | PFDIR | Port F Direction | Read/write | Word | 0000h | |
04h | PFDIR_L | Read/write | Byte | 00h | ||
05h | PFDIR_H | Read/write | Byte | 00h | ||
06h | PFREN | Port F Resistor Enable | Read/write | Word | 0000h | |
06h | PFREN_L | Read/write | Byte | 00h | ||
07h | PFREN_H | Read/write | Byte | 00h | ||
0Ah | PFSEL0 | Port F Select 0 | Read/write | Word | 0000h | |
0Ah | PFSEL0_L | Read/write | Byte | 00h | ||
0Bh | PFSEL0_H | Read/write | Byte | 00h | ||
0Ch | PFSEL1 | Port F Select 1 | Read/write | Word | 0000h | |
0Ch | PFSEL1_L | Read/write | Byte | 00h | ||
0Dh | PFSEL1_H | Read/write | Byte | 00h | ||
16h | PFSELC | Port F Complement Select | Read/write | Word | 0000h | |
16h | PFSELC_L | Read/write | Byte | 00h | ||
17h | PFSELC_H | Read/write | Byte | 00h | ||
18h | PFIES | Port F Interrupt Edge Select | Read/write | Word | undefined | |
18h | PFIES_L | Read/write | Byte | undefined | ||
19h | PFIES_H | Read/write | Byte | undefined | ||
1Ah | PFIE | Port F Interrupt Enable | Read/write | Word | 0000h | |
1Ah | PFIE_L | Read/write | Byte | 00h | ||
1Bh | PFIE_H | Read/write | Byte | 00h | ||
1Ch | PFIFG | Port F Interrupt Flag | Read/write | Word | 0000h | |
1Ch | PFIFG_L | Read/write | Byte | 00h | ||
1Dh | PFIFG_H | Read/write | Byte | 00h | ||
00h | PJIN | Port J Input | Read only | Word | undefined | |
00h | PJIN_L | Read only | Byte | undefined | ||
01h | PJIN_H | Read only | Byte | undefined | ||
02h | PJOUT | Port J Output | Read/write | Word | undefined | |
02h | PJOUT_L | Read/write | Byte | undefined | ||
03h | PJOUT_H | Read/write | Byte | undefined | ||
04h | PJDIR | Port J Direction | Read/write | Word | 0000h | |
04h | PJDIR_L | Read/write | Byte | 00h | ||
05h | PJDIR_H | Read/write | Byte | 00h | ||
06h | PJREN | Port J Resistor Enable | Read/write | Word | 0000h | |
06h | PJREN_L | Read/write | Byte | 00h | ||
07h | PJREN_H | Read/write | Byte | 00h | ||
0Ah | PJSEL0 | Port J Select 0 | Read/write | Word | 0000h | |
0Ah | PJSEL0_L | Read/write | Byte | 00h | ||
0Bh | PJSEL0_H | Read/write | Byte | 00h | ||
0Ch | PJSEL1 | Port J Select 1 | Read/write | Word | 0000h | |
0Ch | PJSEL1_L | Read/write | Byte | 00h | ||
0Dh | PJSEL1_H | Read/write | Byte | 00h | ||
16h | PJSELC | Port J Complement Select | Read/write | Word | 0000h | |
16h | PJSELC_L | Read/write | Byte | 00h | ||
17h | PJSELC_H | Read/write | Byte | 00h |