SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
The fractional LCD biasing voltages, V2 to V5 can be generated internally or externally, independent of the source for VLCD.
The bias generation block diagram for LCD_C static and 2-mux to 8-mux modes is shown in Figure 36-4.
The internally generated bias voltages V2 to V4 are switched to external pins with LCDREXT = 1.
To source the bias voltages V2 to V4 externally, LCDEXTBIAS is set. This also disables the internal bias generation. Typically, an equally weighted resistor divider is used with resistors ranging from a few kΩ to 1 MΩ, depending on the size of the display. When using an external resistor divider, the VLCD voltage may be sourced from the internal charge pump when VLCDEXT = 0 taking the maximum charge pump load current into account. V5 can also be sourced externally when R03EXT = 1. In static mode and all mux modes using 1/2 biasing or 1/3 biasing, when R03EXT = 1 V5 can control the contrast of the connected display by changing the voltage at the low end of the external resistor divider Rx as shown in the left part of Figure 36-4.
When using an external resistor divider, R33 may serve as a switched VLCD output when VLCDEXT = 0. This allows the power to the resistor ladder to be turned off, which eliminates current consumption when the LCD is not used. When VLCDEXT = 1, R33 serves as a VLCD input.
The bias generator supports 1/2 biasing when LCD2B = 1 and 1/3 biasing when LCD2B = 0. In static mode, the internal divider is disabled.
Mode | Bias Configuration | LCD2B | Voltage Level | Pin | Condition |
---|---|---|---|---|---|
Static | Static | X | V1 ("1") | R33 | if LCDREXT = 1 or LCDEXTBIAS = 1 |
V5 ("0") | R03 | if R03EXT = 1 | |||
2-mux, 3-mux, 4-mux | 1/2 | 1 | V1 ("1") | R33 | if LCDREXT = 1 or LCDEXTBIAS = 1 |
V3 ("1/2") | R13 | if LCDREXT = 1 or LCDEXTBIAS = 1 | |||
V5 ("0") | R03 | if R03EXT = 1 | |||
2-mux, 3-mux, 4-mux | 1/3 | 0 | V1 ("1") | R33 | if LCDREXT = 1 or LCDEXTBIAS = 1 |
V2 ("2/3") | R23 | if LCDREXT = 1 or LCDEXTBIAS = 1 | |||
V4 ("1/3") | R13 | if LCDREXT = 1 or LCDEXTBIAS = 1 | |||
V5 ("0") | R03 | if R03EXT = 1 | |||
5-mux to 8-mux | 1/3 | 0 | V1 ("1") | R33 | if LCDREXT = 1 or LCDEXTBIAS = 1 |
V2 ("2/3") | R23 | if LCDREXT = 1 or LCDEXTBIAS = 1 | |||
V4 ("1/3") | R13 | if LCDREXT = 1 or LCDEXTBIAS = 1 | |||
V5 ("0") | R03 | if R03EXT = 1 |