SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
RLAM.A | Rotate left arithmetically the 20-bit CPU register content | ||
RLAM.[W] | Rotate left arithmetically the 16-bit CPU register content | ||
Syntax | RLAM.A #n,Rdst | 1 ≤ n ≤ 4 | |
RLAM.W #n,Rdst or RLAM #n,Rdst | 1 ≤ n ≤ 4 | ||
Operation | C ← MSB ← MSB-1 .... LSB+1 ← LSB ← 0 | ||
Description | The destination operand is shifted arithmetically left 1, 2, 3, or 4 positions as shown in Figure 4-44. RLAM works as a multiplication (signed and unsigned) with 2, 4, 8, or 16. The word instruction RLAM.W clears the bits Rdst.19:16. | ||
Note : This instruction does not use the extension word. | |||
Status Bits | N: | Set if result is negative | |
.A: Rdst.19 = 1, reset if Rdst.19 = 0 | |||
.W: Rdst.15 = 1, reset if Rdst.15 = 0 | |||
Z: | Set if result is zero, reset otherwise | ||
C: | Loaded from the MSB (n = 1), MSB-1 (n = 2), MSB-2 (n = 3), MSB-3 (n = 4) | ||
V: | Undefined | ||
Mode Bits | OSCOFF, CPUOFF, and GIE are not affected. | ||
Example | The 20-bit operand in R5 is shifted left by 3 positions. It operates equal to an arithmetic multiplication by 8. |
RLAM.A #3,R5 ; R5 = R5 x 8