The Power Sequencer (PSQ) block controls the USS module power-up and power-down sequences. The PSQ powers up the USS module when the USS_PWRREQ signal is asserted (see Figure 19-2). The USS_PWRREQ signal can be generated from four different sources. When UUPSCTL.USSPWRUPSEL = 0, writing 1 to UUPSCTL.USSPWRUP generates the USS_PWRREQ signal and starts the USS power-up sequences. The other sources may or may not be available; see the device-specific data sheet for the internal signal sources (search for UUPSCTL.USSPWRUPSEL). The power states of the USS module can be monitored by reading UUPSCTL.UPSTATE.
The order of the USS power-up sequence is:
The USS_PWRREQ is asserted when the USS module is powered off (UUPSCTL.UPSTATE = 0, indicating that the USS module is in OFF state).
The PSQ sends a request to the shared reference (SREF) to generate VBG and starts an internal timer (UUPSCTL.UPSTATE = 2, indicating that the USS power state is in transition).
The PSQ enables the BIAS_REF block when the VBG is ready (UUPSCTL.UPSTATE = 2).
The PSQ turns on the USS_LDO when the required reference voltages and currents are ready (UUPSCTL.UPSTATE = 2).
The PSQ waits for the LDORDY, signal which can be monitored by reading UUPSCTL.LDORDY (UUPSCTL.UPSTATE = 2).
The PSQ enables the HSPLL module when LDORDY = 1 (UUPSCTL.UPSTATE = 2).
The PSQ waits for the PLL_LOCK signal from the HSPLL module. The PLL_LOCK can be monitored by reading HSPLLCTL.PLL_LOCK (UUPSCTL.UPSTATE = 2).
The PSQ sets UUPSCTL.UPSTATE = 3 to indicate that the USS is fully powered and ready to start a new measurement.
If the PSQ internal timer reaches its time-out limit before the PLL_LOCK signal is asserted, UUPSRIS.PTMOUT is set to 1. The time-out is not programmable and can vary depending on the PLL output clock frequency. The maximum delay is 160 µs plus the configured "holdoff time" (~300us max).
CAUTION
The application must turn on the USSXT oscillator (HSPLLUSSXTLCTL.OSCEN = 1) and wait for a sufficient time to let the oscillator start (this depends on the crystal or resonator characteristics) before powering up the USS module. The USSXT oscillator is not controlled by the PSQ. The PSQ assumes that the oscillator output is already available and stable in frequency and amplitude).