SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
DMA Channel Primary Alternate Set (DMAALTSET)
Each bit of the DMAALTSET register represents the corresponding µDMA channel. Setting a bit configures the µDMA channel to use the alternate control data structure. Reading the register returns the status of which control data structure is in use for the corresponding µDMA channel.
DMAALTSET is shown in Figure 8-22 and described in Table 8-32.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SET[n] | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||