SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Ethernet PHY LED Control - MR24 (EPHYLEDCR)
This register provides the ability to control the blink rate on the LED outputs.
EPHYLEDCR is shown in Figure 15-110 and described in Table 15-122.
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15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | BLINKRATE | RESERVED | |||||
R-0x0 | R/W-0x2 | R-0x0 | |||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | |||||||
R-0x0 | |||||||