SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
GPIO 12-mA Drive Select (GPIODR12R)
The GPIODR12R register is the 12-mA drive control register. Each GPIO signal in the port can be individually configured without affecting the other pads. See Table 17-1 for information on how to configure the drive strength. Note that changes in the GPIODR2R, GPIODR4R, or GPIODR8R registers to configure 12 mA are effective on the next clock cycle.
NOTE
This register has no effect on port pins PL6 and PL7 or PM[7:4].
GPIODR12R is shown in Figure 17-30 and described in Table 17-37.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | DRV12 | ||||||||||||||||||||||||||||||
R-0x0 | R/W-0x0 | ||||||||||||||||||||||||||||||