SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
GPIO Interrupt Event (GPIOIEV)
The GPIOIEV register is the interrupt event register. Setting a bit in the GPIOIEV register configures the corresponding pin to detect rising edges or high levels, depending on the corresponding bit value in the GPIO Interrupt Sense (GPIOIS) register (seeSection 17.5.3). Clearing a bit configures the pin to detect falling edges or low levels, depending on the corresponding bit value in the GPIOIS register. All bits are cleared by a reset.
GPIOIEV is shown in Figure 17-9 and described in Table 17-11.
Return to Summary Table.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | IEV | ||||||||||||||||||||||||||||||
R-0x0 | R/W-0x0 | ||||||||||||||||||||||||||||||