SLAZ742B July   2023  – December 2024 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3105-Q1 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3505-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1

 

  1.   1
  2.   Abstract
  3. 1Functional Advisories
  4. 2Preprogrammed Software Advisories
  5. 3Debug Only Advisories
  6. 4Fixed by Compiler Advisories
  7. 5Device Nomenclature
  8. 6Advisory Descriptions
    1. 6.1  ADC_ERR_01
    2. 6.2  ADC_ERR_02
    3. 6.3  ADC_ERR_04
    4. 6.4  ADC_ERR_05
    5. 6.5  ADC_ERR_06
    6. 6.6  BSL_ERR_01
    7. 6.7  COMP_ERR_01
    8. 6.8  COMP_ERR_02
    9. 6.9  COMP_ERR_03
    10. 6.10 COMP_ERR_04
    11. 6.11 CPU_ERR_01
    12. 6.12 DMA_ERR_01
    13. 6.13 GPIO_ERR_01
    14. 6.14 GPIO_ERR_03
    15. 6.15 I2C_ERR_01
    16. 6.16 I2C_ERR_02
    17. 6.17 I2C_ERR_03
    18. 6.18 I2C_ERR_04
    19. 6.19 I2C_ERR_05
    20. 6.20 I2C_ERR_06
    21. 6.21 PMCU_ERR_06
    22. 6.22 PMCU_ERR_08
    23. 6.23 PWREN_ERR_01
    24. 6.24 RTC_ERR_01
    25. 6.25 SPI_ERR_01
    26. 6.26 SPI_ERR_02
    27. 6.27 SPI_ERR_03
    28. 6.28 SPI_ERR_04
    29. 6.29 SPI_ERR_05
    30. 6.30 SYSOSC_ERR_01
    31. 6.31 SYSOSC_ERR_02
    32. 6.32 TIMER_ERR_01
    33. 6.33 TIMER_ERR_04
    34. 6.34 TIMER_ERR_06
    35. 6.35 UART_ERR_01
    36. 6.36 UART_ERR_02
    37. 6.37 VREF_ERR_01
    38. 6.38 VREF_ERR_02
    39. 6.39 WWDT_ERR_01
    40. 6.40 WWDT_ERR_02
  9. 7Revision History

I2C_ERR_05

I2C Module

Category

Functional

Function

I2C SDA may get stuck to zero if we toggle ACTIVE bit during ongoing transaction

Description

If ACTIVE bit is toggled during an ongoing transfer, its state machine will be reset. However, the SDA and SCL output which is driven by the master will not get reset. There is a situation where SDA is 0 and master has gone into IDLE state, here the master won't be able to move forward from the IDLE state or update the SDA value. Slave's BUSBUSY is set (toggling of the ACTIVE bit is leading to a start being detected on the line) and the BUSBUSY won't be cleared as the master will not be able to drive a STOP to clear it.

Workaround

Do not toggle the ACTIVE bit during an ongoing transaction.