SLAZ742B July   2023  – December 2024 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3105-Q1 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3505-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1

 

  1.   1
  2.   Abstract
  3. 1Functional Advisories
  4. 2Preprogrammed Software Advisories
  5. 3Debug Only Advisories
  6. 4Fixed by Compiler Advisories
  7. 5Device Nomenclature
  8. 6Advisory Descriptions
    1. 6.1  ADC_ERR_01
    2. 6.2  ADC_ERR_02
    3. 6.3  ADC_ERR_04
    4. 6.4  ADC_ERR_05
    5. 6.5  ADC_ERR_06
    6. 6.6  BSL_ERR_01
    7. 6.7  COMP_ERR_01
    8. 6.8  COMP_ERR_02
    9. 6.9  COMP_ERR_03
    10. 6.10 COMP_ERR_04
    11. 6.11 CPU_ERR_01
    12. 6.12 DMA_ERR_01
    13. 6.13 GPIO_ERR_01
    14. 6.14 GPIO_ERR_03
    15. 6.15 I2C_ERR_01
    16. 6.16 I2C_ERR_02
    17. 6.17 I2C_ERR_03
    18. 6.18 I2C_ERR_04
    19. 6.19 I2C_ERR_05
    20. 6.20 I2C_ERR_06
    21. 6.21 PMCU_ERR_06
    22. 6.22 PMCU_ERR_08
    23. 6.23 PWREN_ERR_01
    24. 6.24 RTC_ERR_01
    25. 6.25 SPI_ERR_01
    26. 6.26 SPI_ERR_02
    27. 6.27 SPI_ERR_03
    28. 6.28 SPI_ERR_04
    29. 6.29 SPI_ERR_05
    30. 6.30 SYSOSC_ERR_01
    31. 6.31 SYSOSC_ERR_02
    32. 6.32 TIMER_ERR_01
    33. 6.33 TIMER_ERR_04
    34. 6.34 TIMER_ERR_06
    35. 6.35 UART_ERR_01
    36. 6.36 UART_ERR_02
    37. 6.37 VREF_ERR_01
    38. 6.38 VREF_ERR_02
    39. 6.39 WWDT_ERR_01
    40. 6.40 WWDT_ERR_02
  9. 7Revision History

SPI_ERR_03

SPI Module

Category

Functional

Function

When configured as peripheral for a multi-peripheral application, received data will have a right shift

Description

In multi-peripheral scenario, SPI controller first communicates with peripheral0 and then communicates with peripheral1. After finishing communication with peripheral1, the controller again communicates with peripheral0. During the second communication with peripheral0, received data of peripheral0 will have a right shift in the first frame. The peripheral0 is getting first data as 0x3B when the controller sent data 0x76.

Workaround

To support multi peripheral scenario CSCLR needs to be enabled at peripheral end to reset it's RX and TX the bit counters, when there is no active communication happening with that peripheral (CS of that peripheral will be disabled).