SLAZ754 December   2023 MSPM0L1304-Q1 , MSPM0L1305-Q1 , MSPM0L1306-Q1

 

  1.   1
  2.   Abstract
  3. 1Functional Advisories
  4. 2Preprogrammed Software Advisories
  5. 3Debug Only Advisories
  6. 4Fixed by Compiler Advisories
  7. 5Device Nomenclature
    1. 5.1 Device Symbolization and Revision Identification
  8. 6Advisory Descriptions
    1. 6.1  ADC_ERR_01
    2. 6.2  ADC_ERR_02
    3. 6.3  COMP_ERR_01
    4. 6.4  GPIO_ERR_01
    5. 6.5  I2C_ERR_01
    6. 6.6  IO_ERR_01
    7. 6.7  PMCU_ERR_01
    8. 6.8  PMCU_ERR_02
    9. 6.9  PMCU_ERR_03
    10. 6.10 PWREN_ERR_01
    11. 6.11 SPI_ERR_01
    12. 6.12 SYSOSC_ERR_01
  9. 7Revision History

6.5 I2C_ERR_01

I2C module may hold the SDA line in SBMUS mode when an SMBUS quick command is issued

Revisions Affected

Rev C

Details

When the I2C module is target mode and configured for SBMUS, IF the bus controller issues an SMBUS quick command addressed to the device (an I2C START condition followed by a 7-bit address, 1-bit R/W signal, 1-bit ACK, and an I2C STOP condition) with the R/W bit set to read, THEN the I2C module may attempt to pull the SDA line low at the same time that the bus controller is attempting to signal the I2C STOP condition, preventing the STOP condition from completing successfully.

Workaround

Load data into the I2C module transmit FIFO with the MSB set to 1 before the address ACK is completed to prevent the I2C module from driving the SDA line low. This will allow the bus controller to issue the STOP condition successfully and complete the SMBUS quick command.