Abstract

In high power, high frequency power topologies, noise coupling from supply, gate, or input ringing can cause unpredictable gate driver behavior which sometimes lead to glitches and failure. Extreme duty cycles (either close to 0 or close to 100%), with tens of nanoseconds of ON or OFF time duration can aggravate the ringing and overshoot that harm internal gate drive circuits that can lead to electrical overstress (EOS). Engineers often overlook these severe duty cycle conditions in their designs because the stressful effects to the gate driver are not obvious. The goal of this application note is to introduce the concept of narrow input pulses, show the impact on the gate drive circuitry, and discuss system factors that influence the behavior. In the end, it is shown how the pulse width limitation in your specific system can be defined, and approaches are suggested to limit the impact on the system.