SLLSE11H March   2012  – March 2019 SN65HVD72 , SN65HVD75 , SN65HVD78

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Diagram
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Power Dissipation
    7. 7.7  Switching Characteristics: 250 kbps Device (SN65HVD72) Bit Time ≥ 4 µs
    8. 7.8  Switching Characteristics: 20 Mbps Device (SN65HVD75) Bit Time ≥50 ns
    9. 7.9  Switching Characteristics: 50 Mbps Device (SN65HVD78) Bit Time ≥20 ns
    10. 7.10 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Data Rate and Bus Length
        2. 10.2.1.2 Stub Length
        3. 10.2.1.3 Bus Loading
        4. 10.2.1.4 Receiver Failsafe
        5. 10.2.1.5 Transient Protection
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 External Transient Protection
        2. 10.2.2.2 Isolated Bus Node Design
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Related Links
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

4 Revision History

Changes from G Revision (Januarly 2019) to H Revision

  • Changed the Pin Configuration imagesGo
  • Changed Supply voltage, VCC MAX value From = 3.6 V To: 5 V in the Absolute Maximum Ratings tableGo
  • Deleted "or R pin" for VCC in the Absolute Maximum RatingsGo
  • Added reliability note to VCC in the Recommended Operating Conditions tableGo

Changes from F Revision (December 2016) to G Revision

  • Changed From: Supply voltage, VCC MAX value = 5.5 V To: Supply voltage, VCC or R pin MAX value = 3.6 V in the Absolute Maximum Ratings tableGo
  • Changed From: Input voltage at any logic pin To: Voltage at D, DE, or RE in the Absolute Maximum Ratings tableGo

Changes from E Revision (September 2016) to F Revision

  • Changed pin A From: 7 To: 6, and pin B From: 6 To: 7 in Figure 26Go

Changes from D Revision (July 2015) to E Revision

  • Added new Feature: Glitch Free Power-Up and Power-Down Bus Inputs and Outputs Go

Changes from C Revision (September 2013) to D Revision

  • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go

Changes from B Revision (June 2012) to C Revision

  • Deleted Feature: > ±12kV IEC61000-4-2 Air-Gap DischargeGo
  • Added Footnote 2 to the Absolute Maximum Ratings tableGo
  • Changed the Switching Characteristics conditions statement From: 250 kbps devices (SN65HVD70, 71, 72) bit time > 4 µs To: 250 kbps device (SN65HVD72) bit time ≥ 4 µsGo
  • Changed the Switching Characteristics conditions statement From: 250 kbps devices (SN65HVD73, 74, 75) bit time > 50 ns To: 250 kbps device (SN65HVD75) bit time ≥ 50 nsGo
  • Changed the Switching Characteristics conditions statement From: 250 kbps devices (SN65HVD76, 77, 78)bit time > 20 ns To: 250 kbps device (SN65HVD78) bit time ≥ 20 ns Go
  • Added note : RL = 54 Ω to Figure 6, Figure 7, and Figure 8Go
  • Added the DGK package to the SN65HVD72, 75, 78 Logic DiagramGo
  • Replaced the LOW-POWER STANDBY MODE sectionGo
  • Added text to the Transient Protection sectionGo

Changes from A Revision (May 2012) to B Revision

  • Added the SON-8 package and Nodes column to Device Comparison Table,Go
  • Changed the Voltage range at A or B Inputs MIN value From: –8 V To: –13 V in the Absolute Maximum Ratings tableGo
  • Added footnote for free-air temperature to the Recommended Operating Conditions tableGo
  • Changed the Bus input current (disabled driver) TYP values for HVD78 VI = 12 V From: 150 To: 240 and VI = –7 V From: –120 To: –180Go
  • Changed, Thermal InformationGo
  • Changed, Thermal CharacteristicsGo
  • Added TYP values to the Switching Characteristics tableGo
  • Added TYP values to the Switching Characteristics tableGo
  • Changed the SN65HVD72, 75, 78 Logic DiagramGo
  • Added section: LOW-POWER STANDBY MODEGo

Changes from * Revision (March 2012) to A Revision

  • Added VALUEs to the Thermal Characteristics table in the DEVICE INFORMATION section. Go
  • Changed the Switching Characteristics condition statement From: 15 kbps devices (SN65HVD73, 74, 75) bit time > 65 ns To: 20 Mbps devices (SN65HVD73, 74, 75) bit time > 50 nsGo
  • Changed the Switching Characteristics condition statement From: 50 kbps devices (SN65HVD76, 77, 78) bit time > 20 ns To: 50 Mbps devices (SN65HVD76, 77, 78) bit time > 20 nsGo
  • Added Figure 4 to Typical Characteristics. Go
  • Added Figure 5 to Typical Characteristics. Go
  • Added Figure 6 to Typical Characteristics. Go
  • Added Figure 7 to Typical Characteristics. Go
  • Added Figure 8 to Typical Characteristics. Go
  • Added Figure 9 to Typical Characteristics. Go
  • Added Application Information section to data sheet.Go