SLLSF80B October 2019 – March 2022 TCAN1144-Q1 , TCAN1145-Q1 , TCAN1146-Q1
PRODUCTION DATA
INT_ENABLE_2 is shown in Figure 10-85 and described in Table 10-66.
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Interrupt masks for INT_2
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RSVD | UVSUP_ENABLE | UVIO_ENABLE | UVCC_ENABLE | TSD_ENABLE | TSDW_ENABLE | ||
R-000b | R/W-1b | R/W-1b | R/W-1b | R/W-1b | R/W-1b |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-5 | RSVD | R | 000b | Reserved |
4 | UVSUP_ENABLE | R/W | 1b | VSUP under voltage enable |
3 | UVIO_ENABLE | R/W | 1b | VIO under voltage enable |
2 | UVCC_ENABLE | R/W | 1b | VCC under voltage enable |
1 | TSD_ENABLE | R/W | 1b | Thermal shutdown enable |
0 | TSDW_ENABLE | R/W | 1b | Thermal shutdown warning enable |