SLLSF80B October 2019 – March 2022 TCAN1144-Q1 , TCAN1145-Q1 , TCAN1146-Q1
PRODUCTION DATA
SPI_RSVD_x is shown in Figure 10-43 and described in Table 10-24.
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Configuration Reserved Bits Ah to Eh
Offset = Ah + x; where x = 0h to 4h
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SPI_RSVD_x | |||||||
R-00h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-0 | SPI_RSVD_x | R | 0b | SPI reserved registers 0 - 4 |