SLLSFC5C November   2021  – January 2023 ISOUSB211

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Test Circuits
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power Supply Options
      2. 8.3.2  Power Up
      3. 8.3.3  Symmetric Operation, Dual-Role Port and Role-Reversal
      4. 8.3.4  Connect and Speed Detection
      5. 8.3.5  Disconnect Detection
      6. 8.3.6  Reset
      7. 8.3.7  LS/FS Message Traffic
      8. 8.3.8  HS Message Traffic
      9. 8.3.9  Equalization and Pre-emphasis
      10. 8.3.10 L2 Power Management State (Suspend) and Resume
      11. 8.3.11 L1 Power Management State (Sleep) and Resume
      12. 8.3.12 HS Test Mode Support
      13. 8.3.13 CDP Advertising
    4. 8.4 Device Functional Modes
  10. 9 Power Supply Recommendations
  11. 10Application and Implementation
    1. 10.1 Typical Application
      1. 10.1.1 Isolated Host or Hub
      2. 10.1.2 Isolated Peripheral - Self-Powered
      3. 10.1.3 Isolated Peripheral - Bus-Powered
      4. 10.1.4 Application Curve
        1. 10.1.4.1 Insulation Lifetime
    2. 10.2 Meeting USB2.0 HS Eye-Diagram Specifications
    3. 10.3 Thermal Considerations
      1. 10.3.1 VBUS / V3P3V Power
      2. 10.3.2 VCCx / V1P8Vx Power
      3. 10.3.3 Example Configuration 1
      4. 10.3.4 Example Configuration 2
      5. 10.3.5 Example Configuration 3
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Layout Example
      2. 11.1.2 PCB Material
  13. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

6.10 Switching Characteristics

Over recommended operating conditions (unless otherwise noted). All typical values are at TA = 25°C, VBUSx = 5 V, V3P3Vx = 3.3 V, V1P8Vx = 1.8 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER-UP TIMING
TSUPRAMP Allowed power supply ramp-up times on VBUSx,  V3P3Vx ,VCCx and V1P8Vx external power supplies 0.005 100 ms
TPWRUP Time taken for the device to power up, and recognize USB signaling, after valid power supply is provided on both side 1 and side 2. All external power supplies are ramped up together  with 5 µs power up time.  3.6 8 ms
UDx, DDx, HS Driver Switching Characteristics
THSR Rise Time (10% - 90%) USB 2.0 Spec Section 7.1.2,  ideal 45 Ω to GND loads on D+ and D-, EQxx = 00 310 370 510 ps
THSF Fall Time (10% - 90%) USB 2.0 Spec Section 7.1.2,  ideal 45 Ω to GND loads on D+ and D-, EQxx = 00 310 370 510 ps
UDx, DDx, FS Driver Switching Characteristics
TFR Rise Time (10% - 90%) USB 2.0 Spec Figure 7-8, Figure 7-9, CL = 50 pF 4 20 ns
TFF Fall Time (10% - 90%) USB 2.0 Spec Figure 7-8, Figure 7-9, CL = 50 pF 4 20 ns
TFRFM Differential Rise and Fall Time Matching (TFR/TFM) USB 2.0 Spec 7.1.2, Excluding the first transition from the Idle state,  Figure 7-9, CL = 50 pF 90 111.1 %
UDx, DDx, LS Driver Switching Characteristics
TLR Rise Time (10% - 90%) USB 2.0 Spec Figures 7-8 and 7-10, with CL range 50 pF to 600 pF. 75 300 ns
TLF Fall Time (10% - 90%) USB 2.0 Spec Figures 7-8 and 7-10, with CL range 50 pF to 600 pF.  75 300 ns
TLRFM Rise and Fall Time Matching (TLR/TFM), Excluding first transition from idle state. USB 2.0 Spec Figures 7-8 and 7-10, with CL range 50 pF to 600 pF.  80 125 %
REPEATER TIMING - CONNECT, DISCONNECT, RESET, L1, L2
TFILTCONN Debounce filter on FS or LS Connect Detection 45 70 80 µs
TDDIS Time to detect disconnect at the DS facing port in LS/FS L0 mode. 2 7 µs
TDETRST Time taken to detect reset on US port in LS/FS L0 mode 0 7 µs
T2SUSP Time taken by the US side to detect suspend mode (L2) and draw less than 2.5 mA current when bus is continuously in idle state. 3 10 ms
tDRESUMEL1 Maximum time to detect resume on the US and reflect/drive resume on the DS port from sleep/L1 state. 1 µs
tDRESUMEL2 Maximum time to detect resume on the US and reflect/drive resume on the DS port from suspend/L2 state. 130 µs
tDWAKEL1 Maximum time to detect and propagate remote wake when in sleep/L1 state. 5 µs
tDWAKEL2 Maximum pulse width of remote wake that is guranteed to be detected when in suspend/L2 state. 900 µs
tDRSMPROP Minimum duration of resume driven upstream and downstream after detecting remote wake when in suspend/L2 state. 1 ms
CMTI Common mode transient immunity PK-PK common mode noise, VCMPKPK = 1200 V during USB data transmission, see Figure 7-3 50 100 kV/µs
REPEATER TIMING - LS, FS
TLSDD Low-speed Differential Data Propagation Delay USB 2.0 spec section 7.1.14. Figure 7-52(C). 358 ns
TLSOP LS Data bit-width distortion after SOP USB 2.0 spec section 7.1.14. Figure 7-52(C). -40 25 ns
TLSJP LS repeater additive jitter - paired transition USB 2.0 spec section 7.1.14. Figure 7-52(C).  –5 5 ns
TLSJN LS repeater additive jitter - next transition  USB 2.0 spec section 7.1.14. Figure 7-52(C).  –7.0 7.0 ns
TLST Minimum width of SE0 interval during LS differential transition - filtered out by the repeater  USB 2.0 spec section 7.1.4. 210 ns
TLEOPD Repeater EOP delay relative to TLSDD USB 2.0 spec section 7.1.14. Figure 7-53(C). 0 200 ns
TLESK SE0 skew caused by the repeater during LS EOP USB 2.0 spec section 7.1.14. Figure 7-53(C). -100 100 ns
TFSDD Full-Speed Differential Data Propagation Delay USB 2.0 spec section 7.1.14. Figure 7-52(C). 70 ns
TFSOP FS Data bit-width distortion after SOP USB 2.0 spec section 7.1.14. Figure 7-52(C). -10 10 ns
TFSJP FS repeater additive jitter - paired transition USB 2.0 spec section 7.1.14. Figure 7-52(C).  –2 2 ns
TFSJN FS repeater additive jitter - next transition  USB 2.0 spec section 7.1.14. Figure 7-52(C).   –6.0 6.0 ns
TFST Minimum width of SE0 interval during FS differential transition - filtered out by the repeater
USB 2.0 spec section 7.1.4.

 14 ns
TFEOPD Repeater EOP delay relative to TFSDD USB 2.0 spec section 7.1.14. Figure 7-53(C). 0 17 ns
TFESK SE0 skew caused by the repeater during FS EOP USB 2.0 spec section 7.1.14. Figure 7-53(C). -15 15 ns
REPEATER TIMING - HS
THSSOPT High-speed Start of Packet Truncation USB 2.0 spec, section 7.1.10. 6 8 UI
THSEOPD High-speed End of Packet Dribble USB 2.0 spec, section 7.1.13. 7 8 UI
THSPD High-speed Propagation Delay USB 2.0 spec, section 7.1.14. 2 3 4 ns
THSTJ High-speed total additive jitter (output jitter - input jitter) of repeater (includes all complete SOP bits), RX EQ disabled, TX PE disabled. 120 ps
THSRJ High-speed additive random jitter (output jitter - input jitter) of repeater (includes all complete SOP bits), RX EQ disabled, TX PE disabled. 35 ps
THSDJ High-speed additive deterministic jitter (output jitter - input jitter) of repeater (includes all complete SOP bits), RX EQ disabled, TX PE disabled. 82 ps
THSDIS Time window of contiuous no transition during which the HS Disconnect Detector output must be sampled 36 82 ns
TFILT Time for which a Chirp J or Chirp K must be continuously detected (filtered) by hub or device during Reset handshake USB 2.0 spec, section 7.1.7.5. 2.5 µs
CDP TIMING
TVDMSRC_EN Time taken to enable VDMSRC on D- after detecting VDPSRC connection on D+  0.1 ms
TVDMSRC_DIS Time taken to disable VDMSRC on D- after detecting VDPSRC disconnection on D+  0.1 ms
TCON_IDPSINK_DIS Time taken to disable IDP_SINK on D+ after detecting connect  0.1 ms