SLLSG24 November 2024 TCAN2845-Q1 , TCAN2847-Q1
ADVANCE INFORMATION
NO.PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
TCAN2845-Q1 | TCAN2847-Q1 | |||
1 | WAKE2 | WAKE2 | high voltage | Local wake input terminal, high voltage capable |
2 | WAKE1 | WAKE1 | high voltage | Local wake input terminal, high voltage capable |
3 | LIMP | LIMP | high voltage | Limp home output (Active low; open-drain output) |
4 | HSS4 | HSS4 | high voltage | High side switch |
5 | HSS3 | HSS3 | high voltage | High side switch |
6 | HSS2 | HSS2 | high voltage | High side switch |
7 | HSS1 | HSS1 | high voltage | High side switch |
8 | VHSS | VHSS | power | High side switch power |
9 | VSUP | VSUP | high voltage power | High voltage supply from the battery |
10 | VEXMON | VEXMON | power | External PNP emitter connection, shunt connection. Connect to VSUP if external PNP LDO is not used. DO not leave floating. |
11 | VEXCTRL | VEXCTRL | power | External PNP base control |
12 | VEXCC | VEXCC | power | External PNP collector connection feedback |
13 | VCC1 | VCC1 | power | LDO supply output: 3.3V or 5V |
14 | nRST | nRST | digital | VCC output monitor pin (active low) and device reset input |
15 | nINT | nINT | digital | Interrupt output (active low) |
16 | SW | SW | digital | Programming mode input pin (SPI configurable active high or active low) |
17 | SCK | SCK | digital | SPI clock input |
18 | SDI | SDI | digital | SPI data input |
19 | SDO | SDO | digital | SPI data output |
20 | nCS | nCS | digital | Chip select input (active low) |
21 | NU | LTXD | digital | LIN transmit data input (low for dominant and high for recessive bus states). NU is not used and should not be connected to anything. |
22 | NU | LRXD | digital | LIN receive data output (low for dominant and high for recessive bus states), tri-state. NU is not used and should not be connected to anything. |
23 | CTXD | CTXD | digital | CAN transmit data input (low for dominant and high for recessive bus states). |
24 | CRXD | CRXD | digital | CAN receive data output (low for dominant and high for recessive bus states), tri-state. |
25 | GFO | GFO | digital | Function output pin (SPI configurable) |
26 | VCC2 | VCC2 | power | 5V LDO output |
27 | VCAN | VCAN | power | CAN FD transceiver 5V power supply input |
28 | CANH | CANH | bus I/O | High level CAN bus I/O line |
29 | CANL | CANL | bus I/O | Low level CAN bus I/O line |
30 | GND | GND | power | Ground connection: Must be soldered to ground |
31 | NU | LIN | high voltage I/O | LIN bus input/output pin: NU is not used and should not be connected to anything. |
32 | WAKE3/DIR | WAKE3/DIR | high voltage | Local wake input terminal, high voltage capable. Direct drive to control any HSSx when configured |
PAD(1) | GND | GND | power | Ground connection: Must be soldered to ground |