SLLU370 june 2023 THVD4431
The most modern variants of the IC THVD4431RHA Pin 9 is VIO. Pin 16 is a no connect; however, this EVM includes the original pinout of the THVD4431RHA, which is slightly different. The original pinout has pin 9 connected to VCC and pin 16 being a VIO connection. To remedy this, jumpers J28 and J29 must be configured before operation. With J12 and J13 oriented at the top left of the board, J28 and J29 are positioned vertically below U1.
Component ID | Comment |
---|---|
J28 – Original pinout THVD4431 | Shunt bottom pin to 3rd pin to connect VCC |
J28 – Current pinout THVD4431 | Shunt top pin to 2nd pin to connect VIO |
J29 – Original pinout THVD4431 | Shunt top pin to 2nd pin to connect VIO |
J29 – Current pinout THVD4431 | Leave jumper open to keep Pin 16 no connect |
The THVD4431 Transceiver in the RHA (QFN) package from TI has an additional logic supply pin, VIO. This is used to power the internal digital logic circuits inside of the device. In single supply operation mode for the THVD4431RHA, the VIO pin must be shorted to VCC by shorting the header pins of J12, so that the digital circuits are properly powered.
Component ID | Comment |
---|---|
J10 | VCC Power terminal – Attach voltage source of 3 V to 5.5V to terminal block. |
J11 | VIO Power terminal – Leave open for single supply operation. |
J12 | Shunted for single supply operation. |
J13 | Shunted for applications with no separation between EARTH and GND. |
To apply power onto the board, VCC is applied through the J10 terminal. With the board oriented with J12 on the top left side of the board, as shown in Figure 3-1, the signals are, from right to left, VCC, GND, EARTH. The EARTH and GND distinction are used to help the end user determine operational qualities with respect to ground potential differences. If testing methods on reducing ground loop current install a resistor on pad R16.
The THVD4431 transceiver in the RHA (QFN) package from TI has an additional logic supply pin, VIO. This is used to power the internal digital logic circuits inside of the device. In dual supply operation, the digital circuit supply VIO supplies the Logic Signal Pins (L1 – L8) and the control signal pins (SLR,DIR,M2,M0,M1,TERM_TX,TERM_RX, and /SHDN). This supply can operate from 1.65V to 5.5V to allow controllers to communicate with the transceiver at 2.5V and 1.8V logic levels. J12 must be left open for dual supply operation.
Component ID | Comment |
---|---|
J10 | VCC Power terminal – Attach voltage source of 3 V to 5.5V to terminal block. |
J11 | VIO Power terminal – Attach voltage source of 1.65V to 5.5V to terminal block. |
J12 | Left open for dual supply operation. |
J13 | Shunted for applications with no separation between EARTH and GND. |
Powering the board up is similar to the single supply operation. J10 is powered as described in Single Supply Operation (Logic Supply Equals Main Voltage Supply). Using the same orientation as before, (J12 and J13 are top left of the board) and the inputs for the VIO power terminal (J11) are reversed from VCC (J10) – from left to right, is EARTH, GND, VIO. Additional supply decoupling pads are available for VIO terminal block if more decoupling capacitance is needed.