SLOS438F December 2004 – March 2017 TPA2012D2
PRODUCTION DATA.
The TPA2012D2 is designed to operate from an input voltage supply range from 2.5 V to 5.5 V. Therefore, the output voltage range of the power supply must be within this range. The current capability of upper power must not exceed the maximum current limit of the power switch.
The TPA2012D2 requires adequate power supply decoupling to ensure a high efficiency operation with low total harmonic distortion (THD). Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1-µF, within 2 mm of the PVDD/AVDD pins. This choice of capacitor and placement helps with higher frequency transients, spikes, or digital hash on the line. In addition to the 0.1-µF ceramic capacitor, TI recommends placing a 2.2-µF to 10-µF capacitor on the PVDD/AVDD supply trace. This larger capacitor acts as a charge reservoir, providing energy faster than the board supply, thus helping to prevent any droop in the supply voltage.