SLOS930C
November 2015 – October 2024
THS4541-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics: (Vs+) – Vs– = 5 V
6.6
Electrical Characteristics: (Vs+) – Vs– = 3 V
6.7
Typical Characteristics: 5-V Single Supply
6.8
Typical Characteristics: 3-V Single Supply
6.9
Typical Characteristics: 3-V to 5-V Supply Range
7
Parameter Measurement Information
7.1
Example Characterization Circuits
7.2
Frequency-Response Shape Factors
7.3
I/O Headroom Considerations
7.4
Output DC Error and Drift Calculations and the Effect of Resistor Imbalances
7.5
Noise Analysis
7.6
Factors Influencing Harmonic Distortion
7.7
Driving Capacitive Loads
7.8
Thermal Analysis
8
Detailed Description
8.1
Overview
8.1.1
Terminology and Application Assumptions
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Differential I/O
8.3.2
Power-Down Control Pin ( PD)
8.3.2.1
Operating the Power Shutdown Feature
8.3.3
Input Overdrive Operation
8.4
Device Functional Modes
8.4.1
Operation from Single-Ended Sources to Differential Outputs
8.4.1.1
AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
8.4.1.2
DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
8.4.1.3
Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
8.4.1.4
Input Impedance for the Single-Ended to Differential FDA Configuration
8.4.2
Differential-Input to Differential-Output Operation
8.4.2.1
AC-Coupled, Differential-Input to Differential-Output Design Issues
8.4.2.2
DC-Coupled, Differential-Input to Differential-Output Design Issues
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Designing Attenuators
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
9.2.2
Interfacing to High-Performance ADCs
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.3
Application Curve
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Development Support
10.1.1.1
TINA Simulation Model Features
10.2
Documentation Support
10.2.1
Related Documentation
10.3
Receiving Notification of Documentation Updates
10.4
Support Resources
10.5
Trademarks
10.6
Electrostatic Discharge Caution
10.7
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
1
Features
AEC-Q100 qualified for automotive applications:
Temperature grade 1: –40°C to +125°C, T
A
Bandwidth: 500MHz (G = 2V/V)
Gain bandwidth product: 850MHz
Slew rate: 1500V/µs
HD
2
: –95dBc at 10MHz (2V
PP
, R
L
= 500Ω)
HD
3
: –90dBc at 10MHz (2V
PP
, R
L
= 500Ω)
Input voltage noise: 2.2nV/√Hz (f > 100kHz)
Low offset drift: ±0.5µV/°C (typ)
Negative rail input (NRI)
Rail-to-rail output (RRO)
Power supply:
Single-supply voltage range: 2.7V to 5.4V
Split-supply voltage range: ±1.35V to ±2.7V
Quiescent current: 10.1mA (5V supply)
Power-down capability: 2µA (typ)