SLOU579 August   2024 TSD5402-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Hardware Overview
    2. 2.2 Setup
    3. 2.3 Interfaces
    4. 2.4 Settings Via I2C
      1. 2.4.1 TSD5402-Q1 Gain
      2. 2.4.2 TSD5402-Q1 PWM Switching Frequencies
      3. 2.4.3 TSD5402-Q1 Power Guard Protection Circuitry
  9. 3Software
    1. 3.1 Software Overview
      1. 3.1.1 PurePath™ Console 3 (PPC3) Access and Description
      2. 3.1.2 Using the PPC3 Plugin
  10. 4Hardware Design Files
    1. 4.1 TSD5402Q1EVM Schematics
    2. 4.2 TSD5402Q1EVM PCB Layouts
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1. 5.1 Trademarks

2.3 Interfaces

Table 2-1 Hardware Control Switches
Switch Names Pin Name State Description
S1 STANDBY ENABLED Sets the device into an active state and begins the load diagnostic feature. After detection of the normal output condition, the signal output can start. I2C interface is active approx. 1ms after the device is enabled.
STANDBY Assertion of this active-low pin sends the device into a complete shutdown, limiting the current draw. Load-dump protection is supported. I2C is inactive and non-blocking (does not pull I2C bus low) and the device registers are reset.
S2 HI-Z DRIVE

Enables the device output stage, output pins are switching and signal passes from the input to the output.
HI-Z Puts the device is in Hi-Z mode. The output pins stop switching and no signal passes from the input to the output. When device is in STANDBY, HI-Z must be asserted.
Table 2-2 J2 Board Connector
Pin Number Pin Name Pin Description

7

VIN

Power supply input for the device

6

GND

Ground

5

OUT+

Output (+)

4

 OUT-

Output (–)

3

GND

 Ground

2

IN-

Inverting analog input

1

 IN+

Non-inverting analog input