SLUAAM4 December   2023 BQ76905 , BQ76907

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Direct Commands
    1. 1.1 Alarm Enable - 0x66
    2. 1.2 Cell 1 Voltage - 0x14
    3. 1.3 Internal Temperature - 0x28
    4. 1.4 CC2 Current - 0x3A
    5. 1.5 Direct Command Summary
      1. 1.5.1 Disabling Auto Refresh
  5. 2Subcommands
    1. 2.1 DEVICE_NUMBER - 0x0001
    2. 2.2 FET_ENABLE - 0x0022
    3. 2.3 RESET - 0x0012
    4. 2.4 CB_ACTIVE_CELLS - 0x0083
    5. 2.5 Subcommand Summary
  6. 3Reading and Writing RAM Registers
    1. 3.1 Read Enabled Protections A
    2. 3.2 Enter CONFIG_UPDATE Mode
    3. 3.3 Write Enabled Protections A
    4. 3.4 Write VCell Mode
    5. 3.5 Exit CONFIG_UPDATE Mode
    6. 3.6 Reading and Writing RAM Registers Summary
  7. 4I2C With CRC
  8. 5Simple Code Examples
  9. 6References

2 Subcommands

Subcommands use a different format from direct commands and are accessed indirectly using the 7-bit command address space. They also provide the capability for block transfers. To issue a subcommand, the command address is written to 0x3E/0x3F. If data is to be read back, it will be populated in the 32-byte transfer buffer which uses addresses 0x40 - 0x5F.

Certain subcommands write data to a register and must be followed by a write to 0x60/0x61 with the checksum and length. This only applies to the CB_ACTIVE_CELLS, PROG_TIMER, PROT_RECOVERY, and SECURITY_KEYS subcommands. Examples for calculating checksum and length are provided in the next section since this is also required when writing to RAM registers.