SLUAAM4 December   2023 BQ76905 , BQ76907

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Direct Commands
    1. 1.1 Alarm Enable - 0x66
    2. 1.2 Cell 1 Voltage - 0x14
    3. 1.3 Internal Temperature - 0x28
    4. 1.4 CC2 Current - 0x3A
    5. 1.5 Direct Command Summary
      1. 1.5.1 Disabling Auto Refresh
  5. 2Subcommands
    1. 2.1 DEVICE_NUMBER - 0x0001
    2. 2.2 FET_ENABLE - 0x0022
    3. 2.3 RESET - 0x0012
    4. 2.4 CB_ACTIVE_CELLS - 0x0083
    5. 2.5 Subcommand Summary
  6. 3Reading and Writing RAM Registers
    1. 3.1 Read Enabled Protections A
    2. 3.2 Enter CONFIG_UPDATE Mode
    3. 3.3 Write Enabled Protections A
    4. 3.4 Write VCell Mode
    5. 3.5 Exit CONFIG_UPDATE Mode
    6. 3.6 Reading and Writing RAM Registers Summary
  7. 4I2C With CRC
  8. 5Simple Code Examples
  9. 6References

3.2 Enter CONFIG_UPDATE Mode

Before writing RAM registers, the recommendation is to enter CONFIG_UPDATE mode to prevent settings from taking effect until all changes are made. See Table 3-2. SET_CFGUPDATE and EXIT_CFGUPDATE both follow the Subcommand format. In Figure 3-2, the SET_CFGUPDATE Subcommand is given by writing 0x0090 to 0x3E.

Table 3-2 SET_CFGUPDATE and EXIT_CFGUPDATE Descriptions
Command Name Description
0x0090 SET_CFGUPDATE Enters CONFIG_UPDATE mode.
0x0092 EXIT_CFGUPDATE Exits CONFIG_UPDATE mode. This also clears the Battery Status()[POR] and Battery Status()[WD] bits.
GUID-2BA699AC-6FC1-4365-A58A-D7F2BE645B71-low.pngFigure 3-2 Captured I2C Waveform for SET_CFGUPATE