SLUAAP7 January   2024 BQ76905 , BQ76907

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Cell Balancing Circuit Considerations
    1. 2.1 Internal Cell-Balancing Circuit Design
    2. 2.2 External Cell-Balancing Circuit Design Using N-Channel FETs
    3. 2.3 External Cell-Balancing Circuit Design Using BJTs
  6. 3Considerations for a Host-Balancing Algorithm
  7. 4Timing Information
  8. 5Debugging Common Issues With Cell Balancing
    1. 5.1 Using a Resistor Divider as a Cell Simulator
    2. 5.2 Cell Balancing Troubleshooting
  9. 6Summary
  10. 7References

External Cell-Balancing Circuit Design Using N-Channel FETs

For applications that need higher cell balancing current, external FETs are often used. When using external FETs, the cell input resistors can be increased to the maximum recommended value of 1kΩ. Increasing the resistor size will help to provide enough voltage across the gate of the FET. In Figure 2-3, as the internal FET is turned on inside the device, the current flowing through Rn-1 provides the VGS for the external FET.

GUID-20230606-SS0I-KLG4-3PQ8-RHCX797Q2LP9-low.png Figure 2-3 Balancing Circuit Using External N-channel FETs

Care must be taken to select an external FET with a low RDSON defined at low VGS. For example, say the minimum cell balance voltage is 3.9V. The external FET can have an RDSON defined at or below 3.9V x 100 / (100 + 100 + 80) = 1.39V.

A Zener diode is needed to protect the external FET gate from pack transients. For example, in the event of a short across the pack in a 7-cell battery, Cell 7 would have approximately 28V across Rn during the event and the opposite transient at the release of the short circuit. The gate voltage can be connected through a resistor to limit the current when the diode conducts. (During normal operation the Zener will not conduct).

For Figure 2-3, the circuit was designed with an Rn of 100Ω and Rgn of 1kΩ. The Rbal resistor is set to 50Ω for a balance current of approximately 77mA through the external FET at 4V. At this cell voltage, an additional approximately 15mA of current flows through the internal FET of the device for a total balancing current of close to 92mA. An N-channel MOSFET was selected with an RDSON defined for low VGS down to 1.4V.

GUID-20230503-SS0I-PW4M-DQ3C-ZMCFFXRPJ745-low.png Figure 2-4 BQ76907 Cell Balancing With N-Channel FETs, Cell 7 (VC7) Rbal_voltage Approximately = 3.86V
Note: In Figure 2-4, the ON time of the duty cycle represents the voltage across the Rbal resistor while balancing cell 7 (VC7). While the low cycle represents the voltage across Rbal resistor when balancing is OFF.