In this chapter, influence by the extra power supply connected in HB-HS pin is discussed.

The typical schematic when we consider the effect of extra power supply is shown in Figure 3-9. Based on the analysis, the influence of power stage to gate driver can be modeled as a power supply connected in HS pin and ground. The value of power supply will change from V_d2 to V_RDSON to V_CC.

The proper operation process is all the power to drive Q₂ is provided by the V­₂ in mode 3. And in mode 1, all the power to turn on low side FET is provided by V₁. So, no current flow through bootstrap diode now, bootstrap capacitor can be considered as a filter capacitor. So current stress in bootstrap diode will be zero since there is not current flow through it.

In most of the design, we often just let V_­1 vaguely equal to V₂, but this will cause some problems in certain application. The key point is the voltage difference between V₁ and V₂.

If we let V₁ >V₂+V_d1, So the bootstrap circuits will work normally like above analysis. Because output capacitor is in parallel with bootstrap capacitor, and in all of working mode, voltage between HB-HS will be larger than the V₂, So D₂ will withstand reverse bias all the time. It means that V₂ isn’t involved in the system. The only difference in that situation compared to the normal bootstrap circuit operation is that the output capacitor is in parallel with the bootstrap capacitor which means the equivalent capacitance is increased. This will cause more serious current stress in bootstrap diode as we analyze above.

But with one exception, if FET consume too much power of capacitor, V₂ will charge bootstrap capacitor which means the voltage of bootstrap capacitor has been clamped. But this will have limited positive effect for the solution.

Based on the analysis above, simulation and experiments are made to verify the theory.

In Figure 3-10 and Figure 3-11, we compared the current flowing into the bootstrap capacitor in the transient period.

As shown from the simulation results. If we increase bootstrap capacitor, reverse recovery current can increase dramatically. In product application, there is a high risk to cause failure to the gate driver.

Next, we use LM76003 to verify theory, specification of test is shown in Table 3-1. Current probe is used to test the current flowing from HB pin to bootstrap capacitor. As we can see from Figure 3-12 and Figure 3-13, as the bootstrap capacitance increases, reverse recovery current is also increases from -149mA (100nF) to -165mA (4.8uF). And if we use UCC27282 or some other gate driver ICs to build discrete high-power, reverse recovery current amplitude and slew rate when capacitor increase will be higher.

As shown from the simulation and experiments results. If V₁>V₂-V_d1, current stress increases because equivalent capacitance is increased. In product application, this process can cause failure of gate driver.