SLUAAY3 September   2024 PCA9306 , TCA39306 , TCA9548A

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2TCA39306 Level Translation Example
    1. 2.1 What is the Hang Time Effect and Why Does the Hang Time Occur?
    2. 2.2 Implications of Hang Time in an I2C System
  6. 3Summary
  7. 4References

TCA39306 Level Translation Example

Figure 2-1 is a voltage translation application using the TCA39306 I3C level translator between an I2C controller and an I2C target device. TCA39306 is a passive device and is backwards compatible to I2C.

 Voltage Translation Example Using TCA39306 Level TranslatorFigure 2-1 Voltage Translation Example Using TCA39306 Level Translator

The electrical settings for this example are as follows:

RPU = 10kΩ

VCC1 = 3.3V

VCC2 = 5.0V

The TCA39306 is setup in level-translating mode. The TCA39306 EN and VREF2 pins have been shorted together (the EN and VREF2 pin connection is denoted as EN+REF2). This in effect creates a diode like structure that sets the VEN+REF2 voltage to:

Equation 1. V E N + R E F 2   =   3 . 3V   +   V T H

where VTH is the threshold voltage of the passFET approximately 0.6V at room temperature. In the level translator the gate of each FET connecting SCL1 to SCL2 and SDA1 to SDA2 is biased to this VEN+REF2 voltage. Therefore, each passFET gate voltage is adjusted to:

Equation 2. V G A T E   =   3 . 3V   +   V T H

The source voltage is the supply voltage due to the pull-up resistor connection, VSOURCE = 3.3V.

Equation 3. V G S   =   3 . 3V   +   V T H     3 . 3 V   =   V T H

The passFET sits at the edge of the cutoff region due to VGS = VTH. When the controller pulls to a logic LOW of VOL = 0.4V, the source voltage becomes equal to the VOL of the open drain driver. VSOURCE = VOL = 0.4V. Therefore the gate source voltage becomes:

Equation 4. V G S   =   V G A T E     V S O U R C E   =   3 . 9V     0 . 4V   =   3 . 5V   >   V T H   =   0 . 6V

The passFET acts like a switch in the linear operating region and turns on strongly since 3.5V is much greater than the threshold voltage. Current flows from both supply rails VCC1 and VCC2 through the pull-up resistors through the open-drain driver of the controller to GND shown in Figure 2-2.

 The Controller Pulls SDA LOWFigure 2-2 The Controller Pulls SDA LOW

When the controller releases the bus, SDA rises back to VCC1 through the pull-up resistor. VGS decreases and the passFET enters the cutoff region resembling a high impedance state. Because the passFET drain and source terminal are interchangeable, the target can pull the SDA bus LOW. In Figure 2-3 the target pulls SDA LOW (VOL = 0.4V). Once VGS surpasses a VTH = 0.6V, the internal passFET turns on and current flows from both supplies through the open-drain driver to GND similar to when the controller pulled LOW in the first example.

 The Target Pulls SDA LOWFigure 2-3 The Target Pulls SDA LOW

The simple design of the passFET is what allows seamless bi-directional level translation. The TCA39306 allows I2C level translation between two supply rails. In the LOW logic state, both the controller and target see a VOL = 0.4V. In the HIGH logic state the controller sees 3.3V and the target sees 5.0V due to the separation that the passFET produces inside the TCA39306.