SLUS495J August   2001  – December 2023 UCC29002 , UCC39002

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
    1.     Pin Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Differential Current-Sense Amplifier (CS+, CS−, CSO)
      2. 6.3.2 Load-Share Bus Driver Amplifier (CSO, LS)
      3. 6.3.3 Load-Share Bus Receiver Amplifier (LS)
      4. 6.3.4 Error Amplifier (EAO)
      5. 6.3.5 Adjust Amplifier Output (ADJ)
      6. 6.3.6 Enable Function (CS+, CS−)
      7. 6.3.7 Fault Protection on LS Bus
      8. 6.3.8 Start-Up and Adjust Logic
      9. 6.3.9 Bias Input and Bias_OK Circuit (VDD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Start-Up Mode
      2. 6.4.2 Normal Running Mode
      3. 6.4.3 Fault Mode
      4. 6.4.4 Disabled Mode
  8. 7Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Paralleling the Power Modules
    3. 7.3 Typical Application
      1. 7.3.1 Measuring the Voltage Loop of a Power Module
      2. 7.3.2 Detailed Design Procedure
        1. 7.3.2.1 The Shunt Resistor
        2. 7.3.2.2 The CSA Gain
        3. 7.3.2.3 Determining RADJ
        4. 7.3.2.4 Error Amplifier Compensation
      3. 7.3.3 Application Curve
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
      1. 8.1.1 Documentation Support
    2. 8.2 Related Links
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9Revision History
  11.   Mechanical, Packaging, and Orderable Information

6.3.4 Error Amplifier (EAO)

As shown in the Functional Block Diagram, the UCC29002 uses an operational transconductance amplifier (OTA) often referred to as a gM-type error amplifier. The gM amplifier is chosen because it requires only one pin – the output – to be accessible for compensation. This amplifier generates an output current that is proportional to the difference of its noninverting and inverting input voltages. This output current flows out of the EAO pin and developes an error voltage VEAO across the current-loop compensation components connected between the EAO pin and ground.

The purpose of the error amplifier (EA) is to compare the output current level of the respective module monitored by the UCC29002 device (represented by VCSO) to the leader module's current level (represented by VLS) and generate VEAO. VEAO is then used by the Adjust amplifier to adjust the respective module's voltage feedback signal in a way which tends to minimize VEAO. This process results in nearly-equal output currents among the parallel-operated power supply modules.

In cases where the UCC29002 device assumes the role of the leader load-share controller in the system or it is used together with a stand-alone power module, its VLS voltage is approximately equal to its amplified current signal VCSO. To avoid erroneous output voltage adjustment, the input of the error amplifier incorporates an offset to ensure that its inverting input is biased 25mV (typical) higher than its noninverting input. Consequently, when the two input signals to the EA are equal, no adjustment is made and the initial output voltage set-point of the leader module is maintained. The VCSO of follower modules are necessarily at least 25mV lower than the leader's VCSO.

The EA output VEAO is clamped to VOH_EA as specified in the Electrical Characteristics table.