TA = TJ = 25°C, V5D = V5A = 5 V, VIN = 24 V, VUDIMx = 5 V, CV5D = CV5A = 4.7 µF CBSTx = 0.1 µF, CCOMPx = 1 nF, RCSx = 100 mΩ, no load on SWx, LHI pin floating (unless otherwise noted)
Figure 6-1 V(CSP–CSN) Current Sense Threshold vs Temperature
CHxEN = 0, CHxIADJ =
0 | 0 V < VCSN
< 2.5 V |
Figure 6-3 CSN
Source Current vs CSN VoltageFigure 6-5 Minimum Ripple Voltage vs Average Inductor Current Figure 6-7 V5D Sleep Current vs Temperature Figure 6-9 Bootstrap UVLO Threshold vs Temperature Figure 6-11 High-Side Current Limit Threshold vs Temperature Figure 6-13 Low-Side Sinking Current Limit Threshold vs Temperature Figure 6-15 ADC Full Scale vs Temperature Figure 6-17 Minimum On-time vs
Temperature Figure 6-19 UDIM Input Threshold vs Temperature Figure 6-21 COMP Leakage Current vs Temperature Figure 6-23 Efficiency vs Switching Frequency Figure 6-2 V(CSP–CSN) Current Sense Error vs IADJ Count Figure 6-4 CSN Voltage and Leakage
Current vs IADJ Count Figure 6-6 V5D,A POR Threshold vs Temperature Figure 6-8 High Side MOSFET On Resistance vs Temperature Figure 6-10 Bootstrap UVLO Hysteresis vs Temperature Figure 6-12 Low-Side MOSFET On Resistance vs Temperature Figure 6-14 Oscillator Frequency vs Temperature Figure 6-16 DAC Full Scale vs Temperature Figure 6-18 Minimum Off-time vs Temperature Figure 6-20 COMP Overvoltage Detection Threshold vs Temperature Figure 6-22 Efficiency vs LED Current