SLUSD66D September   2019  – February 2021 TPS92520-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Buck Converter Switching Operation
      2. 7.3.2  Switching Frequency and Adaptive On-Time Control
      3. 7.3.3  Minimum On-Time, Off-Time, and Inductor Ripple
      4. 7.3.4  LED Current Regulation and Error Amplifier
      5. 7.3.5  Start-up Sequence
      6. 7.3.6  Analog Dimming and Forced Continuous Conduction Mode
      7. 7.3.7  External PWM Dimming and Input Undervoltage Lockout (UVLO)
      8. 7.3.8  Internal PWM Dimming
      9. 7.3.9  Shunt FET Dimming or Matrix Beam Application
      10. 7.3.10 Bias Supply
      11. 7.3.11 Bootstrap Supply
      12. 7.3.12 ADC
        1. 7.3.12.1 Input Voltage Measurement: VINx
        2. 7.3.12.2 LED Voltage Measurement: CSNx
        3. 7.3.12.3 Bias Supply Measurement: V5D
        4. 7.3.12.4 External Limp-Home Input Measurement: LHI
        5. 7.3.12.5 Junction Temperature Measurement: TEMP
      13. 7.3.13 Faults and Diagnostics
      14. 7.3.14 Output Short Circuit Fault
      15. 7.3.15 Output Open Circuit Fault
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power On Reset (POR)
      2. 7.4.2 Detect SPI Communication
      3. 7.4.3 Standalone Mode
      4. 7.4.4 Load Mode
      5. 7.4.5 Run Mode
      6. 7.4.6 Sleep Mode
      7. 7.4.7 Limp-Home Mode
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
      2. 7.5.2 Command Frame
      3. 7.5.3 Response Frame
        1. 7.5.3.1 Read Response Frame Format
        2. 7.5.3.2 Write Response Frame Format
        3. 7.5.3.3 Write Error/POR Frame Format
      4. 7.5.4 SPI Error
      5. 7.5.5 SPI for Multiple Slave Devices in Parallel Configuration
      6. 7.5.6 SPI for Multiple Slave Devices in Daisy Chain Configuration
    6. 7.6 Register Maps
      1. 7.6.1 Configuration Registers
        1. 7.6.1.1 SYSCFG1 Register (address = 0x00) [reset = 0x10]
        2. 7.6.1.2 SYSCFG2 Register (address = 0x01) [reset = 0x00]
        3. 7.6.1.3 CMWTAP Register (address = 0x02) [reset = 0x08]
      2. 7.6.2 STATUS Registers
        1. 7.6.2.1 STATUS1 Register (address = 0x03)
        2. 7.6.2.2 STATUS2 Register (address = 0x04)
        3. 7.6.2.3 STATUS3 Register (address = 0x05)
      3. 7.6.3 Device Control Registers
        1. 7.6.3.1  Thermal Warning Limit (address = 0x06) [reset = 0x8A]
        2. 7.6.3.2  SLEEP Command (address = 0x07) [reset = 0x00]
        3. 7.6.3.3  CH1IADJL Control Register (address = 0x08) [reset = 0x00]
        4. 7.6.3.4  CH1IADJH Control Register (address = 0x09) [reset = 0x00]
        5. 7.6.3.5  CH2IADJL Control Register (address = 0x0A) [reset = 0x00]
        6. 7.6.3.6  CH2IADJH Control Register (address = 0x0B) [reset = 0x00]
        7. 7.6.3.7  PWMDIV Register (address = 0x0C) [reset = 0x04]
        8. 7.6.3.8  CH1PWML Register (address = 0x0D) [reset = 0x00]
        9. 7.6.3.9  CH1PWMH Register (address = 0x0E) [reset = 0x00]
        10. 7.6.3.10 CH2PWML Register (address = 0x0F) [reset = 0x00]
        11. 7.6.3.11 CH2PWMH Register (address = 0x10) [reset = 0x00]
        12. 7.6.3.12 CH1TON Register (address = 0x11) [reset = 0x07]
        13. 7.6.3.13 CH2TON Register (address = 0x12) [reset = 0x07]
      4. 7.6.4 ADC Measurements
        1. 7.6.4.1  CH1VIN Measurement (address = 0x13)
        2. 7.6.4.2  CH1VLED Measurement (address = 0x14)
        3. 7.6.4.3  CH1VLEDON Measurement (address = 0x15)
        4. 7.6.4.4  CH1VLEDOFF Measurement (address = 0x16)
        5. 7.6.4.5  CH2VIN Measurement (address = 0x17)
        6. 7.6.4.6  CH2VLED Measurement (address = 0x18)
        7. 7.6.4.7  CH2VLEDON Measurement (address = 0x19)
        8. 7.6.4.8  CH2VLEDOFF Measurement (address = 0x1A)
        9. 7.6.4.9  TEMPL Measurement (address = 0x1B)
        10. 7.6.4.10 TEMPH Measurement (address = 0x1C)
        11. 7.6.4.11 V5D Measurement (address = 0x1D)
      5. 7.6.5 Limp-Home Configuration and Command Registers
        1. 7.6.5.1  LHCFG1 Register (address = 0x1E) [reset =0x00]
        2. 7.6.5.2  LHCFG2 Register (address = 0x1F) [reset =0x00h]
        3. 7.6.5.3  LHIL Measurement (address = 0x20)
        4. 7.6.5.4  LHIH Measurement (address = 0x21)
        5. 7.6.5.5  LHIFILTL Register (address = 0x22)
        6. 7.6.5.6  LHIFILTH Register (address = 0x23)
        7. 7.6.5.7  LH1IADJL Register (address = 0x24) [reset = 0x00]
        8. 7.6.5.8  LH1IADJH Register (address = 0x25) [reset = 0x00]
        9. 7.6.5.9  LH2IADJL Register (address = 0x26) [reset = 0x00]
        10. 7.6.5.10 LH2IADJH Register (address = 0x27) [reset = 0x00]
        11. 7.6.5.11 LH1PWML Register (address = 0x28) [reset = 0x00]
        12. 7.6.5.12 LH1PWMH Register (address = 0x29) [reset = 0x00]
        13. 7.6.5.13 LH2PWML Register (address = 0x2A) [reset = 0x00]
        14. 7.6.5.14 LH2PWMH Register (address = 0x2B) [reset = 0x00]
        15. 7.6.5.15 LH1TON Register (address = 0x2C) [reset = 0x07]
        16. 7.6.5.16 LH2TON Register (address = 0x2D) [reset = 0x07]
      6. 7.6.6 RESET Register (address = 0x2E) (Write-Only)
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Duty Cycle Consideration
      2. 8.1.2  Switching Frequency Selection
      3. 8.1.3  LED Current Set Point
      4. 8.1.4  Inductor Selection
      5. 8.1.5  Output Capacitor Selection
      6. 8.1.6  Input Capacitor Selection
      7. 8.1.7  Bootstrap Capacitor Selection
      8. 8.1.8  Compensation Capacitor Selection
      9. 8.1.9  Input Undervoltage Protection
      10. 8.1.10 CSN Protection Diode
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Detailed Design Procedure
          1. 8.2.1.1.1 Calculating Duty Cycle
          2. 8.2.1.1.2 Calculating Minimum On-Time and Off-Time
          3. 8.2.1.1.3 Minimum Switching Frequency
          4. 8.2.1.1.4 LED Current Set Point
          5. 8.2.1.1.5 Inductor Selection
          6. 8.2.1.1.6 Output Capacitor Selection
          7. 8.2.1.1.7 Bootstrap Capacitor Selection
          8. 8.2.1.1.8 Compensation Capacitor Selection
          9. 8.2.1.1.9 External Channel Enable and PWM dimming
      2. 8.2.2 Application Curves
    3. 8.3 Initialization Setup
      1. 8.3.1 Initialize Device without Watchdog timer
      2. 8.3.2 Initialize Device with Watchdog Timer
      3. 8.3.3 Limp-Home Mode
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Compact Layout for EMI Reduction
        1. 10.1.1.1 Ground Plane
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.4.3 Standalone Mode

The TPS92520-Q1 is designed to operate in stand-alone mode without the need for an external microcontroller or SPI-based communication. In this mode, the watchdog timer circuit is disabled and each channel is individually controlled by external inputs. The reference current is set based on the LHI pin voltage and the outputs are enabled using the UDIM inputs. The default value for the on-timer is selected and the channels operate at a fixed switching frequency of 437 kHz. The device also defaults to auto-restart mode for all faults with the fault timer set to 3.6 ms typical. Connecting the LHI pin to GND (below 148-mV threshold) disables both channels and turns off both outputs. If the logic is in Standalone Mode, writing 0xC3 to the RESET register sets all values to default and returns the state machines to the LOAD state. Likewise, if the logic is in Standalone Mode, reading STATUS3 register first to clear the CMWTO bits and then writing 0xD4 to the RESET register sets all values to default and returns the state machine to the DETECT state.