SLUSDH1B may   2020  – april 2023 TPD3S713-Q1 , TPD3S713A-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 FAULT Response
      2. 8.3.2 Cable Compensation
        1. 8.3.2.1 Design Procedure
      3. 8.3.3 DP and DM Protection
      4. 8.3.4 VBUS OVP Protection
      5. 8.3.5 Output and DP or DM Discharge
      6. 8.3.6 Overcurrent Protection
      7. 8.3.7 Undervoltage Lockout
      8. 8.3.8 Thermal Sensing
      9. 8.3.9 Current-Limit Setting
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Truth Table (TT)
      2. 8.4.2 Client Mode
      3. 8.4.3 High-Bandwidth Data-Line Switch
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Capacitance
        2. 9.2.2.2 Output Capacitance
        3. 9.2.2.3 BIAS Capacitance
        4. 9.2.2.4 Output and BIAS TVS
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

6.2 ESD Ratings

VALUEUNIT
V(ESD)Electrostatic dischargeHuman-body model (HBM), per AEC Q100-002(1)±2000(2)V
Charged-device model (CDM), per AEC Q100-011±750(3)
IEC 61000-4-2 contact dischargeDP_IN, DM_IN and VBUS pins(4)±8000
IEC 61000-4-2 air di schargeDP_IN, DM_IN and VBUS pins(4)±15000
ISO 10605 (330 pF, 330 Ω), contact discharge DP_IN, DM_IN and VBUS pins(5) ±8000
ISO 10605 (330 pF, 330 Ω), air discharge DP_IN, DM_IN and VBUS pins(5) ±15000
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
(2) The passing level per AEC-Q100 Classification H2.
(3) The passing level per AEC-Q100 Classification C5.
(4) Surges per IEC 61000-4-2, level 4, 1999 applied from DP_IN, DM_IN and VBUS to output ground of the TPD3S713Q1EVM-103 evaluation module.
(5) Surges per ISO 10605 (330 pF, 330 Ω), applied from DP_IN, DM_IN and VBUS to output ground of the TPD3S713Q1EVM-103 evaluation module.