SLUSDQ4 April 2019 BQ79606A-Q1
PRODUCTION DATA.
The AUX ADC does not support continuous conversion (unlike the CELL ADC). During on-demand reads, the host enables the desired cells or auxiliary inputs to convert using the AUX_ADC_CTRL* registers. After these registers are updated, the host must send a second write to set the CONTROL2[AUX_ADC_GO] bit to start the auxiliary ADC conversion. When the AUX_ADC_GO bit is set, the AUX ADC starts the conversion with the first auxiliary ADC channel. The auxiliary conversions must sequence through each of the enabled channels in the sequence shown in Figure 16.
NOTE
Reads must be done starting with the H byte register. This locks the M (when applicable) and L registers to ensure that the read values come from the same measurement and do not change mid-read. Best practice is to "burst read" all of the registers of interest.
The DEV_STAT[AUX_STAT] bit is set while the AUX ADC is running. Once all of the auxiliary ADC conversions are complete, the AUX_STAT bit is cleared and after ALL of the results(s) are updated in the registers the DEV_STAT[DRDY_AUX] bit is set. Once the DRDY_AUX bit is set, the host is ensured that the register information is current and may read the results from the conversion. If the host reads from a register prior to the conversion finishing, the 0x8000 diagnostic result will be read. Writing to the CONTROL2[AUX_ADC_GO] bit during an AUX conversion terminates the current conversion and restarts the full round-robin.
NOTE
If multiple channels are selected on the auxiliary ADC, the host must provide enough time for the measurements to finish before writing to the CONTROL2[AUX_ADC_GO] bit again. Otherwise, the auxiliary ADC resets and any unfinished conversions are not completed.
The following table summarizes all the AUX ADC parameters and the corresponding registers and the equation required to convert to voltage or temperature:
AUX Parameter(s) | Filtered/corrected | Register(s) | Conversion (Equation) |
---|---|---|---|
VCELL1-6 | Corrected | AUX_CELLL/H | VAUX_CELL*=2x190.7349 uV x 2scomp |
BAT | Uncorrected | AUX_BAT_LU/HU | VBAT=2.827 mV x 2scomp |
Corrected | AUX_BATL/H | VBAT=2.827 mV x 2scomp | |
REF2 | Corrected | AUX_REF2L/H | VREF2=190.7349 uV x 2scomp |
0V | Corrected | AUX_ZEROL/H | VZero=190.7349 uV x 2scomp |
AVDD | Corrected | AUX_AVDDL/H | VAVDD=381.622uV × 2scomp |
GPIO1 | Uncorrected | AUX_GPIO1_LU/MU/HU | VGPIO1=0.745 uV x 2scomp |
Uncorrected and Filtered if DIAG_CTRL4[AUXUSEL]=1 | AUX_GPIO1_LU/MU/HU | VGPIO1=0.745 uV x 2scomp | |
Corrected | AUX_GPIO1L/H | VGPIO1=190.7349 uV x 2scomp | |
GPIO2-6 | Uncorrected | AUX_GPIO*_LU/HU | VGPIO*=190.7349 uV x 2scomp |
Corrected | AUX_GPIO*L/H | VGPIO*=190.7349 uV x 2scomp | |
REF3 | Corrected | AUX_REF3L/H | VREF3=190.7349 uV x 2scomp |
OV DAC | Corrected | AUX_OV_DACL/H | VOV_DAC=190.7349 uV x 2scomp |
UV DAC | Corrected | AUX_UV_DACL/H | VUV_DAC=190.7349 uV x 2scomp |
OT DAC | Corrected | AUX_OT_DACL/H | VOT_DAC=190.7349 uV x 2scomp |
UT DAC | Corrected | AUX_UT_DACL/H | VUT_DAC=190.7349 uV x 2scomp |
TWARN_PTAT | Corrected | AUX_TWARN_PTATL/H | VTWARN_PTAT=190.7349 uV x 2scomp |
DVDD | Corrected | AUX_DVDDL/H | VDVDD=190.7349 uV x 2scomp |
TSREF | Corrected | AUX_TSREFL/H | VTSREF=190.7349 uV x 2scomp |
CVDD | Corrected | AUX_CVDDL/H | VCVDD=548.47 uV × 2scomp |
AVAO_REF | Corrected | AUX_AVAOL/H | AVAO_REF=190.7349 uV x 2scomp |