SLUSE26C June   2021  – January 2022 UCC27614

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD Undervoltage Lockout
      2. 7.3.2 Input Stage
      3. 7.3.3 Enable Function
      4. 7.3.4 Output Stage
    4. 7.4 Device Functional Modes
  8. 8  Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Driving MOSFET/IGBT/SiC MOSFET
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Input-to-Output Configuration
          2. 8.2.1.2.2 Input Threshold Type
          3. 8.2.1.2.3 VDD Bias Supply Voltage
          4. 8.2.1.2.4 Peak Source and Sink Currents
          5. 8.2.1.2.5 Enable and Disable Function
          6. 8.2.1.2.6 Propagation Delay and Minimum Input Pulse Width
          7. 8.2.1.2.7 Power Dissipation
        3. 8.2.1.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Consideration
  11. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

Figure 5-1 8-Pin SONDSG PackageTop View
Figure 5-2 8-Pin SOICD PackageTop View
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME SON DSG NO. SOIC D NO.
EN — 3 I Enable or disable control pin. If not used, connect to VDD.
GND 2,3 4,5 G Device ground or reference
IN — 2 I Non-inverting PWM input
IN+ 1 — I Non-inverting PWM input. If not used, connect to VDD.
IN- 8 — I Inverting PWM input. If not used, connect to GND.
OUT 4,5 6,7 O Output of the driver
VDD 6,7 1,8 P Driver bias supply. Connect the positive node of the voltage source to this pin through an impedance for high common mode noise rejection. Bypass this pin with two ceramic capacitors, generally >=1 µF and 0.1 µF, which are referenced to GND pin of this device.
Thermal Pad — — Connect to GND through large copper plane.

This pad is not a low-impedance path to GND.
(1) I/O = Digital input/output, IA = Analog input, AO= Analog output, P = Power connection