SLUU254A December   2006  – January 2022 TPS40075

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Description
    2. 1.2 Applications
    3. 1.3 Features
  3. 2TPS40075EVM-001 Electrical Performance Specifications
  4. 3Schematic
    1. 3.1 Adjusting Output Voltage (R5 and R6)
    2. 3.2 Using Remote Sense (J3)
    3. 3.3 5-V Input Operation (R10 and R15)
    4. 3.4 Enable
  5. 4Test Setup
    1. 4.1 Equipment
      1. 4.1.1 Voltage Source
      2. 4.1.2 Meters
      3. 4.1.3 Loads
        1. 4.1.3.1 LOAD1
      4. 4.1.4 Recommended Wire Gauge
        1. 4.1.4.1 V12V_IN to J1
        2. 4.1.4.2 J2 to LOAD1 (Power)
        3. 4.1.4.3 J3 to LOAD1 (Remote Sense)
      5. 4.1.5 Other
        1. 4.1.5.1 Fan
        2. 4.1.5.2 Oscilloscope
    2. 4.2 Equipment Setup
      1. 4.2.1 Procedure
      2. 4.2.2 Diagram
    3. 4.3 Start-Up/Shutdown Procedure
    4. 4.4 Equipment Shutdown
  6. 5TPS40075EVM Typical Performance Data and Characteristic Curves
  7. 6EVM Assembly Drawings and Layout
  8. 7List of Materials
  9. 8Revision History

3.1 Adjusting Output Voltage (R5 and R6)

The regulated output voltage can be adjusted within a limited range by changing the ground resistor in the feedback resistor divider (R6 and R5). The output voltage is given by Equation 1.

Equation 1. GUID-27C928D0-B8C5-4414-863F-06548B71EEC3-low.gif

where

  • VVREF = 0.700 V
  • R3 = 10.0 kΩ

Table 3-1 contains common values for R6 to generate popular output voltages with R5 open R5 can be used to increase the accuracy that can be obtained without using more expensive resistors. The TPS40075EVM-001 is stable through these output voltages but the efficiency can suffer as the power stage is optimized for the 1.5-V output.

Table 3-1 Adjusting V1V5_OUT With R14
VOUT (V)R16 (kΩ)
3.3(1)2.67
2.5(1)3.83
2.2(1)4.64
2.0(1)8.36
1.86.34
1.58.66
1.214.0
(1) Due to higher duty cycles associated with higher output voltages or lower input voltages, output current should be limited to 10 A when operating with output voltages greater than 2.0 V or input voltages below 6 V to reduce conduction losses in the main switching FET (Q1). Under these conditions, a lower R(DS)on FET would normally be selected.