SLUUBD5D September   2019  – February 2022 UCC12040 , UCC12050 , UCC12051-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Description
  4. 3Typical Application Circuit and Top Component View
  5. 4Pin Configuration and Pin Functions
    1. 4.1 Pin Functions
  6. 5EVM Setup and Operation
    1. 5.1 U1 Component Selection
    2. 5.2 External Connections for Easy Evaluation
    3. 5.3 High Voltage Isolation
    4. 5.4 Enabling and Disabling the UCC12050
    5. 5.5 SYNC and SYNC_OK Functionality
    6. 5.6 Output Voltage Selection
    7. 5.7 Test Points: TP1, TP2 & TP3
    8. 5.8 Board Level EMI Mitigation Techniques
  7. 6List of Materials
  8. 7Schematic
  9. 8Layout Diagrams
  10. 9Revision History

5.6 Output Voltage Selection

The SEL input determines the output voltage regulation threshold of VISO. The UCC12050EVM-022 provides J5 to easily select between the different output voltage selections. J5 is clearly labeled to easily identify the jumper position required for the desired output voltage. For reference, the SEL connection required to achieve a particular ISO regulation is provided in Table 5-1. The device interprets the SEL pin as part of the startup routine, so the SEL state at startup is used to set the regulation point. Any change to J5 has no effect during operation. To change the output voltage regulation, it is required to disable the device (or power down), change the shunt to the desired position, then enable (or power on) the UCC12050.

Table 5-1 Output Voltage Regulation Selections
SEL PositionOutput Voltage
SEL connected directly to VISO5.0 V
SEL connected to VISO through 100 kΩ5.4 V
SEL connected to GNDS through 100 kΩ3.7 V
SEL connected directly to GNDS3.3 V