SLUUBG8C November 2018 – October 2021 UCC20520 , UCC21320-Q1 , UCC21520 , UCC21520-Q1 , UCC21521 , UCC21530
The dead time (DT) between the outputs of the two channels is set according to: DT (in ns) = 10 × RDT (in kΩ).
The steady-state voltage at DT pin is around 0.8 V, and the DT pin current will be less than 10 µA when RDT = 100 kΩ. Therefore, TI recommends to parallel a ceramic bypass capacitor (2.2 nF or above) with RDT to achieve better noise immunity and better dead-time matching between two channels, especially when the dead time is larger than 300 ns. The major consideration is that the current through the RDT is used to set the dead time, and this current decreases as RDT increases. This bypass capacitor is not installed in the EVM, but the user can easily install it on the bottom layer where the RDT is located.