SLUUCI8 November 2023 BQ76905
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
SSA | SSB | SAA | SAB | XCHG | XDSG | SHUTV | CB |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
FULLSCAN | ADSCAN | WAKE | SLEEP | TIMER_ALARM | INITCOMP | CDTOGGLE | POR |
Description: Latched signal used to assert the ALERT pin. Write a bit high to clear the latched bit.
Bit | Field | Description |
---|---|---|
15 | SSA | This bit is latched when a bit in Safety Status A() is set, and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
14 | SSB | This bit is latched when a bit in Safety Status B() is set, and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
13 | SAA | This bit is latched when a bit in Safety Alert A() is set, and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
12 | SAB | This bit is latched when a bit in Safety Alert B() is set, and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
11 | XCHG | This bit is latched when the CHG driver is disabled, and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
10 | XDSG | This bit is latched when the DSG driver is disabled, and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
9 | SHUTV | This bit is latched when either a cell voltage has been measured below Shutdown Cell Voltage, or the stack voltage has been measured below Shutdown Stack Voltage. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be
asserted low.
0 = Flag is not set 1 = Flag is set |
8 | CB | This bit is latched when cell balancing is active, and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
7 | FULLSCAN | This bit is latched when a full scan is complete (including cell voltages, top-of-stack voltage, temperature, and diagnostic measurements), and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the
ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
6 | ADSCAN | This bit is latched when a voltage ADC measurement scan is complete (this includes the cell voltage measurements and one additional measurement), and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes
the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
5 | WAKE | This bit is latched when the device is wakened from SLEEP mode, and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
4 | SLEEP | This bit is latched when the device enters SLEEP mode, and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
3 | TIMER_ALARM | This bit is latched when the programmable timer expires, and the bit is included in the mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
2 | INITCOMP | This bit is latched when the device completes the startup measurement sequence (which runs after an initial powerup, after a device reset, when the device exits CONFIG_UPDATE mode, and when it exits DEEPSLEEP mode) and the bit is included in the
mask. The bit is cleared when written with a "1". A bit set here causes the ALERT pin to be asserted low.
0 = Flag is not set 1 = Flag is set |
1 | CDTOGGLE | This bit is latched when the debounced CHG Detector signal is different from the last debounced value. 0 = Flag is not set 1 = Flag is set |
0 | POR | This bit is latched when the POR bit in Battery Status is asserted. 0 = Flag is not set 1 = Flag is set |