SLUUCI8 November 2023 BQ76905
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
DSGPWMEN | DSGPWMON_6 | DSGPWMON_5 | DSGPWMON_4 | DSGPWMON_3 | DSGPWMON_2 | DSGPWMON_1 | DSGPWMON_0 |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DSGPWMOFF_7 | DSGPWMOFF_6 | DSGPWMOFF_5 | DSGPWMOFF_4 | DSGPWMOFF_3 | DSGPWMOFF_2 | DSGPWMOFF_1 | DSGPWMOFF_0 |
Description: Controls the PWM mode of the DSG FET driver. Values are not used until the second byte is written.
Bit | Field | Description |
---|---|---|
15 | DSGPWMEN | DSG FET driver PWM mode control 0 = DSG FET driver PWM mode is disabled 1 = DSG FET driver PWM mode is enabled |
14–8 | DSGPWMON_6–DSGPWMON_0 | Time the DSG FET driver is enabled when PWM mode is enabled. Settings from 30.52 µs to 3.876 ms in steps of 30.52 µs A setting of 0 disables PWM mode, such that this command has no effect. |
7–0 | DSGPWMOFF_7–DSGPWMOFF_0 | Time the DSG FET driver is disabled each cycle when PWM mode is enabled. Settings from 122.1 µs to 31.128 ms in steps of 122.1 µs A setting of 0 disables PWM mode, such that this command has no effect. |