SLUUCP5 March   2023 TPS62A06 , TPS62A06A

 

  1.   Abstract
  2.   Trademarks
  3. 1Warning and Caution
  4. 2Introduction
    1. 2.1 Performance Specification
    2. 2.2 Modifications
      1. 2.2.1 Input and Output Capacitors
      2. 2.2.2 Feedforward Capacitor
  5. 3Setup
    1. 3.1 Connector Descriptions
    2. 3.2 Hardware Setup
  6. 4Board Layout
  7. 5TPS62A06EVM-248 Test Results
  8. 6Schematic and Bill of Materials
    1. 6.1 Schematic
    2. 6.2 Bill of Materials

3.1 Connector Descriptions

J1, Pin 1 and 2 – VINPositive input voltage connection from the input supply for the EVM
J1, Pin 3 and 4 – S+/S–Input voltage sense connections, measure the input voltage at this point
J1, Pin 5 and 6 – GNDInput return connection from the input supply for the EVM
J2, Pin 1 and 2 – VOUTPositive output voltage connection
J2, Pin 3 and 4 – S+/S–Output voltage sense connections, measure the output voltage at this point
J2, Pin 5 and 6 – GNDOutput return connection
JP2 – PG/GNDThe PG output appears on pin 1 of this header with a convenient ground on pin 2.
JP1 – ENEN pin jumper. Place the supplied jumper across ON and EN to turn on the IC. Place the jumper across OFF and EN to turn off the IC.
JP3 – PG Pullup VoltagePG pin pullup voltage jumper. Place the supplied jumper on JP3 to connect the PG pin pull-up resistor to the output voltage. Alternatively, the jumper can be removed and a different voltage can be supplied on pin 2 to pull up the PG pin to a different level. This externally applied voltage must remain below 5.5 V.