SLUUCU5 June   2024 TPS544C27

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
      1. 1.1.1 Before You Begin
    2. 1.2 Electrical Performance Specifications
    3. 1.3 Device Information
  8. 2Hardware
    1. 2.1 Test Equipment
      1. 2.1.1 Voltage Source
      2. 2.1.2 Oscilloscope
      3. 2.1.3 Multimeters
      4. 2.1.4 Output Load
      5. 2.1.5 Fan
      6. 2.1.6 USB-to-GPIO Interface Adapter:
      7. 2.1.7 Recommended Wire Gauge
    2. 2.2 List of Test Points, Jumpers, and Connectors
    3. 2.3 Efficiency Measurement Test Points
    4. 2.4 Control Loop Gain and Phase Measurement
    5. 2.5 External 5V bias to enhance efficiency
    6. 2.6 Input Current Measurement
  9. 3Software
    1. 3.1 Opening the PMBus Fusion GUI
    2. 3.2 Monitor Page
    3. 3.3 Status Page
  10. 4Performance Data and Typical Characteristics Curves
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layout
    3. 5.3 BOM
  12. 6Trademarks

2.5 External 5V bias to enhance efficiency

An external bias ranging 4.75V to 5.3V can be connected to VCC/VDRV pin and power the device. This enhances the efficiency of the converter because the VCC and VRDV power supply current now runs from this internal bias instead of the internal LDO.

Considerations when using an external bias on the VCC and VDRV pin are shown below

  • Connect the external bias to VCC/VDRV pin.
  • When the external bias is applied on the VCC/VDRV pin earlier than PVIN rail, the internal LDO is be always forced off and the internal analog circuits have a stable power supply rail at their power enable.
  • (Not recommended) When the external bias is applied on the VCC/VRDV pin late (for example, after PVIN rail ramp-up), any power-up and power-down sequencing can be applied as long as there is excess current pulled out of the VCC/VDRV pin. Understand that an external discharge path on the VCC/VDRV pin, which can pull a current higher than the current limit of the internal LDO, can potentially turn off VCC LDO, thereby shutting off the converter output.
  • A good power-up sequence is: The external bias is applied first, then the 12V bus is applied on PVIN and then EN signal goes high.