SLVAEK4B January 2020 – June 2021 TPS4H160-Q1

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TPS4H160-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Pin short-circuited to Ground (see Table 4-2)
Pin open-circuited (see Table 4-3)
Pin short-circuited to an adjacent pin (see Table 4-4)
Pin short-circuited to VS (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects

Class	Failure Effects
A	Potential device damage that affects functionality
B	No device damage, but loss of functionality
C	No device damage, but performance degradation
D	No device damage, no impact to functionality or performance

Figure 4-1 shows the TPS4H160-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS4H160-Q1 data sheet.

Figure 4-1 Pin Diagram (Version A)

Figure 4-2 Pin Diagram (Version B)

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

Follows data sheet recommendation for operating conditions, external components selection and PCB layout.

Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
GND	1, 12	Resistor/diode network will be bypassed if present.	B
NC	2, 19, 24	No effect.	D
INx	3, 4, 5, 6	Shutdown of corresponding channel.	B
STx	7, 8, 9, 10	Version A only. Status being reported may be erroneous.	B
SEH	7	Version B only. If DIAG_EN is high then only channel 3 or 4's (depending on SEL) sense current output will be on SNS pin.	B
SEL	8	Version B only. If DIAG_EN is high then only channel 1 or 2's (depending on SEH) sense current output will be on SNS pin.	B
FAULT	9	Version B only. Status being reported may be erroneous.
CS	10	Version B only. Sense current not valid from CS pin.	B
CL	11	Device will default to internal current limit.	C
THER	13	Device will default to "auto-retry" mode when encountering thermal fault.	B
DIAG_EN	14	Diagnostics will be disabled.	B
OUTx	15,16,17, 18, 25, 26, 27, 28	Current limit of device will engage.	B
VS	20, 21, 22, 23	Device will have no input supply and therefore not function.	B

Table 4-3 Pin FMA for Device Pins Open-Circuited

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
GND	1, 12	Loss of ground detection engages and device shuts off.	B
NC	2, 19, 24	No effect.	D
INx	3, 4, 5, 6	Corresponding channel will be shutdown and INx will be pulled down internally.	B
STx	7, 8, 9, 10	Version A only. STx pin cannot pull high and diagnostics cannot be reported.	B
SEH	7	Version B only. Pulled low internally, however wrong SNS current potentially reported on CS if DIAG_EN is high.	B
SEL	8	Version B only. If DIAG_EN is high then only channel 1 or 2's (depending on SEH) sense current output will be on SNS pin.	B
FAULT	9	Version B only. Fault signal not reported.	B
CS	10	Version B only. Correct sense current cannot be read.	B
CL	11	Device will default to internal current limit.	C
THER	13	Internally pulled down. Device will default to "auto-retry" mode when encountering thermal fault.	B
DIAG_EN	14	Internally pulled down. Diagnostics will be disabled.	B
OUTx	15, 16, 17, 18, 25, 26, 27, 28	No effect. If configured, open load detection will trigger.	B
VS	20, 21, 22, 23	Device will have no input supply and therefore not function.	B

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin

Pin Name	Pin No.	Shorted to	Description of Potential Failure Effect(s)	Failure Effect Class
GND	1	NC	No effect.	D
NC	2	IN1	No effect.	D
IN1	3	IN2	IN1 signal will affect IN2 signal and vice versa.	B
IN2	4	IN3	IN2 signal will affect IN3 signal and vice versa.	B
IN3	5	IN4	IN3 signal will affect IN4 signal and vice versa.	B
IN4	6	ST1	Version A only. If ST1 is high then channel 4 will be on.	B
IN4	6	SEH	Version B only. IN4 signal will affect SEH and vice versa.	B
ST1	7	ST2	Version A only. Fault reporting of channel 1 and channel 2 may be erroneous.	B
SEH	7	SEL	Version B only. SEH signal will affect SEL and vice versa. If DIAG_EN is high only channel 1 or 4 can be read at SNS.	B
ST2	8	ST3	Version A only. Fault reporting of channel 2 and channel 3 may be erroneous.	B
SEL	8	FAULT	Version B only. If FAULT high and DIAG_EN high, only channel 2 or channel 4 can be read at SNS.	B
ST3	9	ST4	Version A only. Fault reporting of channel 3 and channel 4 may be erroneous.	B
FAULT	9	CS	Version B only. Fault reporting and current sense reporting will be erroneous.	B
ST4	10	CL	Version A only. ST4 voltage could cause erroneous current limit to be set on device.	B
CS	10	CL	Version B only. Voltage level on CS could cause erroneous current limit to be set on device.	B
CL	11	GND	Device will default to internal current limit.	C
GND	12	THER	Device will be in "auto-retry" mode when encountering a thermal fault.	B
THER	13	DIAG_EN	THER signal will affect DIAG_EN signal and vice versa.	B
OUT4	15	OUT4	No effect	D
OUT4	16	OUT3	Output of channel 4 will be tied to output of channel 3.	B
OUT3	17	OUT3	No effect.	D
OUT3	18	NC	No effect.	D
NC	19	VS	No effect.	D
VS	20	VS	No effect.	D
VS	23	NC	No effect.	D
NC	24	OUT2	No effect.	D
OUT2	25	OUT2	No effect.	D
OUT2	26	OUT1	Output of channel 2 will be tied to output of channel 1.	B
OUT1	27	OUT1	No effect.	D

Table 4-5 Pin FMA for Device Pins Short-Circuited to supply (VS)

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
GND	1, 12	Supply power will be bypassed and device will not turn on.	B
NC	2, 19, 24	No effect.	D
INx	3, 4, 5, 6	Potential violation of absolute maximum rating of pin and possible breakdown of ESD cell.	A
STx	7, 8, 9, 10	Version A only. Potential violation of absolute maximum rating of pin and possible breakdown of ESD cell.	A
SEH	7	Version B only. Potential violation of absolute maximum rating of pin and possible breakdown of ESD cell	A
SEL	8	Version B only. Potential violation of absolute maximum rating of pin and possible breakdown of ESD cell.	A
FAULT	9	Version B only. Potential violation of absolute maximum rating of pin and possible breakdown of ESD cell.	A
CS	10	Version B only. Potential violation of absolute maximum rating of pin and possible breakdown of ESD cell.	A
CL	11	Potential violation of absolute maximum rating of pin and possible breakdown of ESD cell.	A
THER	13	Potential violation of absolute maximum rating of pin and possible breakdown of ESD cell.	A
DIAG_EN	14	Potential violation of absolute maximum rating of pin and possible breakdown of ESD cell.	A
OUTx	15, 16, 17, 18, 25, 26, 27, 28	Output will be pulled to supply voltage. Short-to-battery detection will be triggered if configured.	B