SLVAF76 August   2021 TPS62901 , TPS62902 , TPS62902-Q1 , TPS62903 , TPS62903-Q1

 

  1.   Trademarks
  2. 1Applications With Limited Area
    1. 1.1 Best TPS62903 Configuration to Reduce Size
    2. 1.2 Design Example
  3. 2Applications With High Efficiency and Thermal Requirement
    1. 2.1 Conduction Losses in the MOSFET
    2. 2.2 Conduction Losses in the Inductor
    3. 2.3 Switching Losses in the MOSFET
    4. 2.4 Losses in the Input and Output Capacitors
    5. 2.5 Analysis and Recommendations
  4. 3Conclusion

2.3 Switching Losses in the MOSFET

The switching losses mostly occurring when the FETs are turning ON and OFF. A loss is generated during the transition (the rising and falling transitions). The switching-loss on the high-side FET is calculated with Equation 4:

Equation 4. SW_H_Loss=0.5×VIN×IOUT×(t_rise+t_fall)×Fsw

where

  • t_rise is the rise time of the switch node voltage
  • t_fall is the fall time of the switch node voltage
  • Fsw is the switching frequency on the converter.

As Equation 4 shows, the switching frequency, rise and fall time have a direct impact on the switching losses. When selecting the switching frequency of the TPS62903, it is always good to consider using the lowest setting, in this case, 1 MHz with Power Save Operation Mode (Auto PFM/PWM). In this mode, the switching frequency decreases linearly with the load current maintaining high efficiency. The losses in the low-side FET can be estimated in the same manner.