SLVAFF0 September   2022 TPS25947 , TPS2597 , TPS25981 , TPS25982 , TPS25985

 

  1.   Abstract
  2.   Trademarks
  3. 1Understanding the FET SOA
  4. 2Ensuring FET SOA in Hot-Swap Design
  5. 3eFuse Ensuring Integrated FET SOA Operation
    1. 3.1 Thermal Shutdown
    2. 3.2 eFuse Response to Events Stressing Integrated FET
  6. 4Plotting eFuse AOA
  7. 5eFuse Application Design Recommendations to Ensure Integrated FET Reliability
  8. 6Summary
  9. 7References

3.2 eFuse Response to Events Stressing Integrated FET

Table 3-1 eFuse Response to Stress Events
Stress eventSequence of eventsProbable SOA region to violateProtection SchemeTest Waveforms For TPS2597
StartupHigh voltage drop and inrush current ->high power dissipation->FET junction temperature rises and reaches TSD threshold -> TSD scheme turns off eFuseThermal and electro-thermal SOAThermal shutdown and proprietary protectionFigure 3-2
Power up into short circuitEnable eFuse-> starts into current limit-> very high power dissipation due to high VDS-> additional proprietary layer of thermal protection ensures that FET will not enter into thermal instability region by turning off FET prior.Electrothermal, thermal and electrical SOAProprietary protection, thermal shutdown and current limitFigure 3-3
As as shown in Figure 3-3 that since Vds stress is high as compared to Figure 3-4 for same current limit setting of 8 A, time for eFuse to shutdown is lower here.
Overload during steady stateeFuse limits the current first->the output voltage drops ->increased power dissipation in the integrated FET ->rise in junction temperature->Thermal shutdown scheme takes care of FET SOA here by turning off FET when temperature reaches TSD threshold.Electrical and thermal SOACurrent limit and thermal shutdownFigure 3-4
Hard short circuit during steady stateeFuse performs a fast-trip within 1 us thus not letting high current build inside FET and letting the eFuse operate in SOA.Electrical and thermal SOAFast-tripFigure 3-5
Figure 3-2 Failed Startup
Figure 3-4 Current Limiting
Figure 3-3 Power up into Short-circuit
Figure 3-5 Output Short-Circuit During Steady State