SLVAFJ8 may   2023 TPS7H5001-SP

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2System Design Theory
    1. 2.1  Switching Frequency
    2. 2.2  Leading Edge Blanking
    3. 2.3  Dead Time
    4. 2.4  Enable and UVLO
    5. 2.5  Output Voltage Programing
    6. 2.6  Soft Start
    7. 2.7  Sensing Circuit
    8. 2.8  FAULT Mode
    9. 2.9  HICCUP Mode
    10. 2.10 Slope Compensation
    11. 2.11 Output Capacitance
    12. 2.12 Compensation
  6. 3Test Results
  7. 4Bill of Materials
  8. 5Schematics
  9. 6PCB Layouts
  10. 7References

2.7 Sensing Circuit

The sensing circuit of the buck converter was set-up with a similar time period to the inductance and parasitic resistance of the output inductor. This process allows for a triangle wave similar to the output current to be generated from a resistor and capacitor in parallel with the output inductor. This is then directly fed into the CS_ILIM pin of the controller.