SLVAFL5 September   2023 TPS61299

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction of Water Heater
  5. 2Low Voltage Start-up Boost Converter Introduction
    1. 2.1 General Introduction About TPS61299
    2. 2.2 Introduction about Traditional Start-up Process
    3. 2.3 Down Mode and Boost Mode Operation
  6. 3TPS61299 Ultra-low Voltage Start-up Design
    1. 3.1 Ultra Low Voltage Start-up Set up
    2. 3.2 The Way AVIN influence Start-up Process
    3. 3.3 The Way Vout Influence Start-up Process
    4. 3.4 The Way L Influence Start-up process
      1. 3.4.1 Why With the Larger Inductance, The Smaller PVIN Start-up Can Be Achieved?
      2. 3.4.2 Why Does The Inductance Continue to Increase, The Minimum PVIN to Start Up Is Not Lower
      3. 3.4.3 Why 80 mV Can Start Normally While 70 mV Fail to?
  7. 4Ultra-low Voltage Start-up Design
    1. 4.1 Test Waveform
  8. 5Summary
  9. 6References

2.3 Down Mode and Boost Mode Operation

To be added , during startup when the input voltage is higher than the output voltage, the TPS61299X works in down mode to maintain the switching state. In down mode, the high side PMOS source is switched to SW node, other than Vout (in boost mode) node. Refer to Figure 2-4 and Figure 2-6 to compare the difference of high side PMOS between down mode and boost mode. During the toff period, the gate bus of the high side PMOS is pulled to the input voltage (AVIN) instead of ground, then the source node, that is SW node , can be charged to AVIN+Vgs_th due to the internal Cgs of the PMOS (Vgs_th is about 0.7V for high side PMOS ), referring Figure 2-5to see the inductor current and SW node voltage. Therefore, the SW bus voltage is 0.7V higher than Vin, then the inductor can be discharged and the energy can be converted to the output.

During down mode, the high side PMOS works under saturation zone, other than fully turning on state , thus the efficiency is much lower than boost mode. In this way, the voltage drop across the PMOS is increased enough to regulate the output voltage. Under this mode, the power loss will also increase, and heat dissipation needs to be considered. Therefore, the current limit of the device version can be taken into account carefully because if the load is so heavy that the input current is close to the current limit, with the efficiency drop under down mode, the device can fail to start up normally. Also the current limit will decrease as well under down mode operation.

The device enters boost mode After the Vout ramps over input voltage. The source node of the high side PMOS is switched to VOUT bus, as is shown in Figure 2-6. Figure 2-7 shows the inductor current and SW node voltage waveforms. During the toff period, SW high side PMOS is on, thus SW voltage is equal to VOUT, which means the drop voltage on the inductor is VOUT-VIN.

Overall speaking, the main difference between the start up solution as shown in are the difference of actual voltage at the VIN pin seen by the device, which determines the threshold when the device exits down mode and enters boost mode. Because the efficiency of boost mode is much higher than down mode, the behavior of start-up process may differ a lot, which will be discussed in more detail in Section 3.

GUID-20230830-SS0I-GKTG-MJGQ-FH973XX67C47-low.svgFigure 2-4 Down Mode Topology
GUID-20230830-SS0I-VBXM-VBTM-RFSGQZ67S0FB-low.svgFigure 2-6 Boost Mode Topology
GUID-20230925-SS0I-KH9M-B0B9-6VQHSXCWVQN4-low.svgFigure 2-5 Down Mode Waveform
GUID-20230920-SS0I-5JQR-GGMJ-1DJNJG44DGPS-low.svgFigure 2-7 Boost Mode Waveform