SLVAFU5 July   2024 LP87521-Q1 , LP87562-Q1 , LP87563-Q1 , TPS62811-Q1 , TPS745-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Design Parameters
  6. 3 Power Design
  7. 4 Sequencing
    1. 4.1 Startup
    2. 4.2 Shutdown
  8. 5 Schematic
  9. 6 Compatibility with X9HP
  10. 7 Software Drivers
  11. 8 Recommended External Components
  12. 9 Summary
  13. 10References

2 Design Parameters

Table 2-1 shows the power rails, load requirements, and startup or shutdown sequencing requirements and Section 8 shows typical measurement data.
Table 2-1 Design Parameters
VOLTAGE (V) RAIL NAME MAX LOAD (mA) SOURCE STARTUP DELAY (trigger) SHUTDOWN DELAY (trigger)
0.6 VDDQLP_DRAM 500 AP_TPS628501 0ms (EN_TPS628501 high) 0ms (EN_TPS628501 low)
0.8 VDDIO_RTC0V8 5 RTC_LDO2 0ms (EN_RTC_LDO2 high) 0ms (EN_RTC_LDO2 low)
0.85 VDD_SAF_0V85 1000 SAF_BUCK1 0ms (SAF_BUCK1 = SYS_PWR_ON high) 10ms (SAF_BUCK1 = SYS_PWR_ON low)
VDD_AP_0V85 10000 LP87562_B0-B2 0ms (LP87562_EN1 = SYS_CTRL0 high) 3ms (LP87562_EN1 = SYS_CTRL0 low)

VDD_MIPI_0V85

VDD_PCIE_0V85

VDD_USB

VDDD_USB

 450 LP87562_B0-B2 0ms (LP87562_EN1 = SYS_CTRL0 high) 3ms (LP87562_EN1 = SYS_CTRL0 low)
VDD_DRAM_0V85 2000 LP87562_B3 0ms (LP87562_EN1 = SYS_CTRL0 high) 3ms (LP87562_EN1 = SYS_CTRL0 low)
VDD_CPU_0V85 10000 LP87521_B0-B3 0ms (LP87521_EN1 = SYS_CTRL1 high) 3ms (LP87521_EN1 = SYS_CTRL1 low)
VDD_GPU_0V85 8000 LP87563_B0-B1 2ms (LP87563_EN1 = SYS_CTRL1 high) 1ms (LP87521_EN1 = SYS_CTRL1 low)
1.1 VDDQ_DRAM_1V1 750 LP87563_B2 1ms (LP87563_EN1 = SYS_CTRL1 high) 1ms (LP87521_EN1 = SYS_CTRL1 low)
1.8 VDD_RTC_1V8 300 RTC_LDO1 0ms (EN_RTC_LDO1 high) 0ms (EN_RTC_LDO1 low)
VDD_SAF_1V8 <500 SAF_LDO1 0ms (EN_SAF_LDO1 high) 0ms (EN_SAF_LDO1 low)

VDDA_1V8

VDDA_MIPI_1V8

 1300 LP87563_B3 1ms (LP87563_EN1 = SYS_CTRL1 high) 2ms (LP87563_EN1 = SYS_CTRL1 low)
VDD_LP4_1V8 200 AP_TPS745 0ms (EN_AP_TPS745 high) 0ms (EN_AP_TPS745 low)
3.3 VDD_SAF_3V3 <500 SAF_LDO2 0ms (EN_SAF_LDO2 high) 0ms (EN_SAF_LDO2 low)
VDDH_3V3

VDDIO_3V3

 750 AP_TLV767 0ms (EN_AP_TLV767 high) 0ms (EN_AP_TLV767 low)
Signal RTC_RESET - PG_RTC_LDO2 - -
SAFETY_RESET - PG_SAF_LDO1 - -
AP_RESET - PG_AP_TPS628501 - -