This application brief details two optimized power-tree designs for the Horizon Robotics Journey 3 (J3) system-on-chip (SoC). Design A is a power-management IC (PMIC) and Design B is a discrete power design. Designs support operation from a car battery (40V absolute maximum) using the primary regulator LM63635-Q1 to step the voltage down to 5V. All components in the design are AEC-Q100-qualified.

Design A: PMIC reference design leverages TPS6593-Q1 (ASILD compliant), TPS628502-Q1, or TPS628503-Q1 synchronous buck converters and TPS745-Q1 low-dropout (LDO) regulators. The TPS6593-Q1 IC has five buck converters and four LDOs. This PMIC has a non-volatile memory (NVM) programmable, meaning the default register values are set in the TI production line to the desired values for this platform without further need for the customer to change settings. The full orderable part number for this one-time-programmable (OTP) spin is TPS6593C3C0RWERQ1.

Design B: Discrete power reference design with the TPS62812-Q1, TPS624421-Q1, TPS62873-Q1, and TPS62813-Q1 synchronous buck converters and LP5907-Q1 LDOs.

Power Design

Figure 1 shows the block diagram for design (A) using the TPS6593-Q1, TPS62850x-Q1, and TPS745-Q1.

Figure 1 Design A: PMIC Design for J3

Figure 2 shows a block diagram design (B) using the TPS62812-Q1, TPS624421-Q1, TPS62873-Q1, TPS62813-Q1 and LP5907-Q1.

Figure 2 Design B: Discrete Design for J3

For a more detailed power design application note, contact China-reference-design-team@list.ti.com for further details.